公开(公告)号：US5093890A

公开(公告)日：1992-03-03

申请号：US618768

申请日：1990-11-27

申请人： Mark F. Bregman ,  Ismail C. Noyan ,  Mark B. Ritter ,  Harold S. Stone

发明人： Mark F. Bregman ,  Ismail C. Noyan ,  Mark B. Ritter ,  Harold S. Stone

IPC分类号： G02B6/24 ,  G02B6/28 ,  G02B6/42 ,  G02B6/43 ,  G06E3/00 ,  H01L27/15 ,  H04B10/213

CPC分类号： G02B6/43 ,  G02B6/2817

摘要： An optical bus for interconnecting electronic devices. The bus has a substrate with through-holes therein. An optically conductive material is disposed on one side of the substrate. The material fills the through-holes and forms a layer of predetermined thickness on this side of the substrate. In the outer surface of this layer there are facets or angled regions. The surface and facets are optically reflective. Cards or modules are optically connected by means of optical connectors to the through-holes on the opposite side of the substrate. Light emitted by the connector travels to the associated faceted surface from which it reflects towards other faceted surfaces from which it is partially transmitted and partially reflected to another connector. The arrangement permits optical communication between a plurality of electronic devices.

公开(公告)号：US5093879A

公开(公告)日：1992-03-03

申请号：US542275

申请日：1990-06-22

申请人： Mark F. Bregman ,  William D. Brewer ,  Mitchell S. Cohen ,  Glen W. Johnson ,  Ismail C. Noyan ,  Modest M. Oprysko ,  Mark B. Ritter ,  Dennis L. Rogers ,  Jeanine M. Trewhella

发明人： Mark F. Bregman ,  William D. Brewer ,  Mitchell S. Cohen ,  Glen W. Johnson ,  Ismail C. Noyan ,  Modest M. Oprysko ,  Mark B. Ritter ,  Dennis L. Rogers ,  Jeanine M. Trewhella

IPC分类号： G02B6/42 ,  G02B6/43 ,  H01L31/12 ,  H01L31/167 ,  H04B10/00

CPC分类号： G02B6/4249 ,  G02B6/43 ,  H01L31/167 ,  H04B10/803

摘要： A direct optical connector (DOC) comprised of first and second members, each including a plurality of light emitting and light detecting locations, operative in combination with energy transfer media to form direct optical connections between the light emitting locations and the light detecting locations, wherein said first and second members are adapted for reclosable connection to each other whereupon the light emitting locations on one member are aligned with the light detecting locations on the other member. The first and second members of the preferred DOC are modular. Alternative forms of energy transfer media are used in various embodiments of the invention including lenslet arrays, imaging fiber plates (IFPs), and energy transfer fiber plates (ETFPs). These media have differing alignment criteria, differing degrees of immunity from crosstalk, differing degrees of transfer efficiency, different manufacturing costs, etc., thereby permitting the fabrication and/or use of a connector most suited to meet the requirements of a particular application.A modular half of a DOC can be used in conjunction with a remote optical connector (ROC) to channel light over relatively long distances. The invention also encompasses processes for fabricating ROCs.

公开(公告)号：US5263620A

公开(公告)日：1993-11-23

申请号：US843693

申请日：1992-02-28

申请人： Bernardo Hernandez ,  Raymond R. Horton ,  Ismail C. Noyan ,  Michael J. Palmer ,  Mark B. Ritter

发明人： Bernardo Hernandez ,  Raymond R. Horton ,  Ismail C. Noyan ,  Michael J. Palmer ,  Mark B. Ritter

IPC分类号： H01L21/60 ,  B08B3/02 ,  B23K1/018 ,  B26F3/00 ,  H05K13/04

CPC分类号： H05K13/0486 ,  B23K1/018 ,  H01L24/98 ,  H01L2224/05554 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85201 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/20752 ,  Y10T225/10 ,  Y10T225/30 ,  Y10T225/329 ,  Y10T29/49821 ,  Y10T29/53274

摘要： A method and apparatus for removing wires bonded between chip contact pads and substrate contact pads using an alternating fluid flow is described. The fluid flow is preferably air. A nozzle having a plurality of air jets within a chip accommodating cavity is disposed over the chip to enclose the chip contact pads, the substrate contact pads and the wires bonded therebetween. Air is forced through the plurality of jets to cause an alternating clockwise and counter clockwise air flow which bends the plurality of wires back and forth until they fatigue at the contact points to the chip contact pads in a substrate contact pads which results in the wires being substantially simultaneously severed therefrom. The nozzle has an aperture out through which the air escapes carrying the severed wires therewith for collection in a filter.

公开(公告)号：US5186632A

公开(公告)日：1993-02-16

申请号：US762977

申请日：1991-09-20

申请人： Raymond R. Horton ,  Ismail C. Noyan ,  Michael J. Palmer ,  Mark B. Ritter

发明人： Raymond R. Horton ,  Ismail C. Noyan ,  Michael J. Palmer ,  Mark B. Ritter

IPC分类号： H01R24/00 ,  H01R12/62 ,  H01R12/72 ,  H05K3/36 ,  H05K7/02

CPC分类号： H01R12/62 ,  H01R12/721 ,  H05K3/365 ,  H05K7/023

摘要： An interconnecting and mounting technology involving the use of elastomeric properties. A mounting member grips, in a notch, the edge of a device supporting planar member with the device conductors brought to that edge. Conductors are provided at the surface of the mounting member, contacting the device conductors in the notch, and connecting with external wiring conductors on an external wiring planar member. The external wiring to device conductor interconnecting conductors can be on flex tape including elastomeric contact adaptation. Retention force for mounting member compression and mounting member to external wiring planar member retention is provided.

公开(公告)号：US5189363A

公开(公告)日：1993-02-23

申请号：US583261

申请日：1990-09-14

申请人： Mark F. Bregman ,  Paul R. Hoffman ,  Peter G. Ledermann ,  Paul A. Moskowitz ,  Roger A. Pollak ,  Timothy C. Reiley ,  Mark B. Ritter

发明人： Mark F. Bregman ,  Paul R. Hoffman ,  Peter G. Ledermann ,  Paul A. Moskowitz ,  Roger A. Pollak ,  Timothy C. Reiley ,  Mark B. Ritter

IPC分类号： G01R31/26 ,  G01R1/073

CPC分类号： G01R1/0735

摘要： A system for testing chips uses a patterned tape having a patterned array of cantilevered contact leads. The tape serves as an interface between the chip under test and a testing unit by providing conductive leads from the I/O terminals on the chip to an off-chip measuring system. The leads on the array may have balls, tips or other shapes on the end to provide contact with the terminals and compensate for height differences. The tape is a single frame or has a series of arrays each positioned around an opening where the chip will be located when a particular pattern is positioned over that chip for test. The pattern on the tape may be the same array or a different array. The tape is indexed to a new pattern when the old one is damaged or no longer needed. Alignment with the chip is by optical sensing and physical pin movement. The tape may have a flap protruding into an aperture and deflectable to provide for planar contact of the leads to the device under test.

公开(公告)号：US08832011B2

公开(公告)日：2014-09-09

申请号：US13611722

申请日：2012-09-12

申请人： Bipin Rajendran ,  Mark B. Ritter

发明人： Bipin Rajendran ,  Mark B. Ritter

IPC分类号： G06N3/04 ,  G06N3/00 ,  G06N3/063

CPC分类号： G06N3/0635 ,  G06N3/04 ,  G06N3/049

摘要： According to a technique, an electronic device is configured to correspond to characteristic features of a biological synapse. The electronic device includes multiple bipolar resistors arranged in parallel to form an electronic synapse, an axonal connection connected to one end of the electronic synapse and to a first electronic neuron, and a dendritic connection connected to another end of the electronic synapse and to a second electronic neuron. An increase and decrease of synaptic conduction in the electronic synapse is based on a probability of switching the plurality of bipolar resistors between a low resistance state and a high resistance state.

公开(公告)号：US08429107B2

公开(公告)日：2013-04-23

申请号：US12611968

申请日：2009-11-04

申请人： Monty M. Denneau ,  Daniel J. Friedman ,  Ralph Linsker ,  Mark B. Ritter

发明人： Monty M. Denneau ,  Daniel J. Friedman ,  Ralph Linsker ,  Mark B. Ritter

IPC分类号： G06F15/18 ,  G06N3/08

CPC分类号： H04L47/521

摘要： A system, method, and design structure for address-event-representation network simulation are provided. The system includes a hardware structure with a plurality of interconnected processing modules configured to simulate a plurality of interconnected nodes. To simulate each node, the hardware structure includes a source table configured to receive an input message and identify a weight associated with a source of the input message. The hardware structure also includes state management logic configured to update a node state as a function of the identified weight, and generate an output signal responsive to the updated node state. The hardware structure further includes a target table configured to generate an output message in response to the output signal, identify a target to receive the output message, and transmit the output message. The hardware structure may further include learning logic configured to combine information about input messages and generated output signals, and to update weights.

摘要翻译： 提供了一种用于地址事件表示网络仿真的系统，方法和设计结构。 该系统包括硬件结构，其具有被配置为模拟多个互连节点的多个互连的处理模块。 为了模拟每个节点，硬件结构包括被配置为接收输入消息并且识别与输入消息的源相关联的权重的源表。 硬件结构还包括状态管理逻辑，其被配置为根据所识别的权重更新节点状态，并响应于更新的节点状态生成输出信号。 硬件结构进一步包括目标表，其被配置为响应于输出信号产生输出消息，识别目标以接收输出消息，并发送输出消息。 硬件结构还可以包括被配置为组合关于输入消息和生成的输出信号的信息并且更新权重的学习逻辑。

公开(公告)号：US08053819B2

公开(公告)日：2011-11-08

申请号：US12120899

申请日：2008-05-15

申请人： Kerry Bernstein ,  Paul W. Coteus ,  Philip George Emma ,  Allan Mark Hartstein ,  Stephen V. Kosonocky ,  Ruchir Puri ,  Mark B. Ritter

发明人： Kerry Bernstein ,  Paul W. Coteus ,  Philip George Emma ,  Allan Mark Hartstein ,  Stephen V. Kosonocky ,  Ruchir Puri ,  Mark B. Ritter

IPC分类号： H01L29/80

CPC分类号： G11C5/063 ,  G11C5/14 ,  H01L21/8221 ,  H01L27/0688 ,  H03H1/0007

摘要： An IC structure having reduced power loss and/or noise includes two or more active semiconductor regions stacked in a substantially vertical dimension, each active semiconductor region including an active layer. The IC structure further includes two or more voltage supply planes, each of the voltage supply planes corresponding to a respective one of the active layers.

摘要翻译： 具有降低的功率损耗和/或噪声的IC结构包括以基本上垂直的尺寸堆叠的两个或更多个有源半导体区域，每个有源半导体区域包括有源层。 IC结构还包括两个或更多个电压供应平面，每个电压供应平面对应于相应的一个有源层。

公开(公告)号：US5495545A

公开(公告)日：1996-02-27

申请号：US328177

申请日：1994-10-24

申请人： Michael F. Cina ,  Dennis L. Karst ,  Modest M. Oprysko ,  Mark B. Ritter ,  Stephen L. Spanoudis ,  Jeannine M. Trewhella

发明人： Michael F. Cina ,  Dennis L. Karst ,  Modest M. Oprysko ,  Mark B. Ritter ,  Stephen L. Spanoudis ,  Jeannine M. Trewhella

IPC分类号： G02B6/42 ,  G02B6/36

CPC分类号： G02B6/4206

摘要： A method for making an optical fiber transmission apparatus for limiting the optical modes which were emitted from a source in such a way to impinge on an optical fiber to extract a high bandwidth from the fiber. The apparatus includes a lens or aperture to control the angle and distribution of light launched into the fiber. The apparatus achieves reproducibly high bandwidths in large core step-index optical fibers of short transmission length distances. The lens or aperture introduces light from the source into the fiber at an angle at which substantially no intermode delay occurs as the light propagates down the fiber. An integral fiber optic coupling assembly that includes an optical electronic component receptacle, the lens and/or aperture, and an optical fiber connector interface which provides low cost easy to manufacture assembly is also disclosed. A unitary plastic housing provides the function of a lens and mechanical reference or locating features for the light source and optical fiber.

摘要翻译： 一种制造光纤传输装置的方法，用于限制从源发射的光模，以照射到光纤上以从光纤提取高带宽。 该装置包括用于控制发射到光纤中的光的角度和分布的透镜或孔。 该装置在具有短传输长度距离的大型核心阶跃折射率光纤中实现可重复的高带宽。 透镜或光圈将光从光源引入光纤，其角度基本上不发生模式间延迟，因为光沿着光纤传播。 还公开了一种包括光学电子部件插座，透镜和/或孔径以及提供低成本易于制造组装的光纤连接器接口的整体光纤耦合组件。 单一的塑料外壳提供了一个透镜的功能，并为光源和光纤提供机械参考或定位功能。

公开(公告)号：US20110106741A1

公开(公告)日：2011-05-05

申请号：US12611968

申请日：2009-11-04

申请人： Monty M. Denneau ,  Daniel J. Friedman ,  Ralph Linsker ,  Mark B. Ritter

发明人： Monty M. Denneau ,  Daniel J. Friedman ,  Ralph Linsker ,  Mark B. Ritter

IPC分类号： G06F15/18 ,  G06N3/08

CPC分类号： H04L47/521

摘要： A system, method, and design structure for address-event-representation network simulation are provided. The system includes a hardware structure with a plurality of interconnected processing modules configured to simulate a plurality of interconnected nodes. To simulate each node, the hardware structure includes a source table configured to receive an input message and identify a weight associated with a source of the input message. The hardware structure also includes state management logic configured to update a node state as a function of the identified weight, and generate an output signal responsive to the updated node state. The hardware structure further includes a target table configured to generate an output message in response to the output signal, identify a target to receive the output message, and transmit the output message. The hardware structure may further include learning logic configured to combine information about input messages and generated output signals, and to update weights.

摘要翻译： 提供了一种用于地址事件表示网络仿真的系统，方法和设计结构。 该系统包括硬件结构，其具有被配置为模拟多个互连节点的多个互连的处理模块。 为了模拟每个节点，硬件结构包括被配置为接收输入消息并且识别与输入消息的源相关联的权重的源表。 硬件结构还包括状态管理逻辑，其被配置为根据所识别的权重更新节点状态，并响应于更新的节点状态生成输出信号。 硬件结构进一步包括目标表，其被配置为响应于输出信号产生输出消息，识别目标以接收输出消息，并发送输出消息。 硬件结构还可以包括被配置为组合关于输入消息和生成的输出信号的信息并且更新权重的学习逻辑。