Method of making an organic memory cell
    4.
    发明授权
    Method of making an organic memory cell 有权
    制造有机记忆体的方法

    公开(公告)号:US07374654B1

    公开(公告)日:2008-05-20

    申请号:US10978845

    申请日:2004-11-01

    摘要: A method of making an organic memory cell which comprises two electrodes with a controllably conductive media between the two electrodes is disclosed. The present invention involves providing a dielectric layer having formed therein one or more first electrode pads; removing a portion of the first electrode pad to form a recessed area on top of the pads and in the dielectric layer using reverse electroplating; forming a controllably conductive media over the first electrode pad in the recessed area; and forming a second electrode over the conductive media. The controllably conductive media contains an organic semiconductor layer and a passive layer.

    摘要翻译: 公开了一种制造有机存储单元的方法,该方法包括在两个电极之间具有可控导电介质的两个电极。 本发明涉及提供在其中形成有一个或多个第一电极焊盘的电介质层; 去除所述第一电极焊盘的一部分以在所述焊盘的顶部和所述电介质层中使用反向电镀形成凹陷区域; 在所述凹陷区域中的所述第一电极焊盘上形成可控导电介质; 以及在所述导电介质上形成第二电极。 可控导电介质包含有机半导体层和无源层。

    Silicon containing material for patterning polymeric memory element
    7.
    发明授权
    Silicon containing material for patterning polymeric memory element 有权
    含硅材料用于图案化聚合物记忆元件

    公开(公告)号:US06803267B1

    公开(公告)日:2004-10-12

    申请号:US10614484

    申请日:2003-07-07

    IPC分类号: H01L21336

    摘要: The present invention provides a method to fabricate an organic memory device, wherein the fabrication method includes forming a lower electrode, depositing a passive material over the surface of the lower electrode, applying an organic semiconductor material over the passive material, and operatively coupling the an upper electrode to the lower electrode through the organic semiconductor material and the passive material. Patterning of the organic semiconductor material is achieved by depositing a silicon-based resist over the organic semiconductor, irradiating portions of the silicon-based resist and patterning the silicon-based resist to remove the irradiated portions of the silicon-based resist. Thereafter, the exposed organic semiconductor can be patterned, and the non-irradiated silicon-based resist can be stripped to expose the organic semiconductor material that can be employed as a memory cell for single and multi-cell memory devices. A partitioning component can be integrated with the memory device to facilitate stacking memory devices and programming, reading, writing and erasing memory elements.

    摘要翻译: 本发明提供一种制造有机存储器件的方法,其中所述制造方法包括形成下电极,在所述下电极的表面上沉积无源材料,在所述被动材料上施加有机半导体材料,以及将所述有源半导体材料 上电极通过有机半导体材料和被动材料到下电极。 有机半导体材料的图案化是通过在有机半导体上沉积硅基抗蚀剂,照射硅基抗蚀剂的部分并图案化硅基抗蚀剂以除去硅基抗蚀剂的照射部分来实现的。 此后,可以对暴露的有机半导体进行构图,并且可以剥离未照射的硅基抗蚀剂以暴露可用作单电池和多电池存储器件的存储器单元的有机半导体材料。 分区组件可以与存储器件集成,以便于堆叠存储器件和编程,读取,写入和擦除存储器元件。

    Method(s) facilitating formation of memory cell(s) and patterned conductive
    10.
    发明授权
    Method(s) facilitating formation of memory cell(s) and patterned conductive 失效
    促进形成记忆体和图案化的导电聚合物膜的方法

    公开(公告)号:US06753247B1

    公开(公告)日:2004-06-22

    申请号:US10285183

    申请日:2002-10-31

    IPC分类号: H01L214763

    摘要: A methodology for forming a memory cell is disclosed, wherein an organic polymer layer is formed over a conductive layer and an electrode layer is formed over the organic polymer layer. A first via is etched into the electrode and organic polymer layers, and a dielectric material is applied over the stack to at least fill in the first via. A second via is then etched into the dielectric material so as to expose and make the electrode layer available as a top electrode. A wordline is then formed over the dielectric material such that the top electrode is connected to the wordline by way of the second via. A memory device formed in accordance with the disclosed methodology includes a top electrode formed over an organic polymer layer, a conductive layer under the organic polymer layer, a via defined by a dielectric material and located above the top electrode, and a wordline formed over the dielectric material such that the top electrode is connected to the wordline by way of the via.

    摘要翻译: 公开了一种用于形成存储单元的方法,其中在导电层上形成有机聚合物层,并且在有机聚合物层上形成电极层。 将第一通孔蚀刻到电极和有机聚合物层中,并且将电介质材料施加到堆叠上以至少填充在第一通孔中。 然后将第二通道蚀刻到电介质材料中,以暴露并使电极层可用作顶部电极。 然后在电介质材料上形成字线,使得顶部电极通过第二通孔连接到字线。 根据所公开的方法形成的存储器件包括形成在有机聚合物层上的顶部电极,有机聚合物层下面的导电层,由电介质材料限定并位于顶部电极之上的通孔,以及形成在上部电极上的字线 电介质材料,使得顶部电极通过通孔连接到字线。