Pyrimidinedione derivatives and antiarrythmic agents containing the same
    1.
    发明授权
    Pyrimidinedione derivatives and antiarrythmic agents containing the same 失效
    嘧啶二酮衍生物和含有它们的抗焦虑剂

    公开(公告)号:US5308848A

    公开(公告)日:1994-05-03

    申请号:US927738

    申请日:1992-08-12

    CPC分类号: C07D239/545 C07D401/12

    摘要: A pyrimidinedione derivative compound has a basic backbone in which a phenyl group part and a pyrimidinedione part are linked by a linking structure comprising an alkyl chain containing two nitrogen atoms. This linking structure is represented by ##STR1## [wherein A is --(CH.sub.2).sub.n --, --CO-- or --O--(CH.sub.2).sub.m --; each of R.sup.1 and R.sup.2 is independently a hydrogen atom or a lower alkyl group which may be substituted by a hydroxyl group, or R.sup.1 and R.sup.2 may be so linked with each other as to make an alkylene chain and thus form a heterocyclic structure; R.sup.5 is a halogen atom, a hydroxyl group, a lower alkyloxycarbonyl group, a lower alkyloxy group which may be substituted by a lower alkyloxy group, or a lower alkyl group which may be substituted by a hydroxyl group, or R.sup.5 may be so linked with R.sup.1 as to make an alkylene chain and thus form a heterocyclic structure; n is 0, 1, 2 or 3 (when R.sup.5 is the hydroxyl group, n.noteq.0); m is 0, 1, 2 or 3; and k is 0, 1, 2 or 3 (however, a compound in which A is --O--(CH.sub.2).sub.m -- and R.sup.5 is the hydroxyl group is excluded from the pyrimidinedione derivative)]. The pyrimidinedione derivative and its acid addition salt are useful for a medical treatment of cardiac arrhythmias.

    摘要翻译: 嘧啶二酮衍生物化合物具有其中苯基部分和嘧啶二酮部分通过包含含有两个氮原子的烷基链的连接结构连接的碱性主链。 该连接结构由表示,其中A是 - (CH 2)n - , - CO-或-O-(CH 2)m - ; R 1和R 2各自独立地为氢原子或可以被羟基取代的低级烷基,或者R 1和R 2可以相互连接形成亚烷基链,从而形成杂环结构; R5是卤素原子,羟基,低级烷氧基羰基,可被低级烷氧基取代的低级烷氧基或可被羟基取代的低级烷基,或R5可以与 R1形成亚烷基链,从而形成杂环结构; n是0,1,2或3(当R5是羟基时,n是等于0); m为0,1,2或3; 并且k为0,1,2或3(然而,其中A为-O-(CH 2)m - 且R 5为羟基的化合物不包括在嘧啶二酮衍生物中]]。 嘧啶二酮衍生物及其酸加成盐可用于治疗心律失常。

    Hole examining device
    6.
    发明授权
    Hole examining device 有权
    孔检装置

    公开(公告)号:US09212881B2

    公开(公告)日:2015-12-15

    申请号:US13878511

    申请日:2011-11-08

    摘要: In a hole examining device, an examination head (105) is supported to be movable in an X direction and a Y direction which are orthogonal to each other, measurement heads (125, 126) are supported to be movable in a Z direction which is orthogonal to the X direction and the Y direction with respect to the examination head (105), and a plurality of first measurers (127) and a plurality of second measurers (128) are arranged in the measurement heads (125, 126) in parallel and may be held at an advance position which advances as well as retreats with respect to the Z direction, thereby improving workability of an examining operation.

    摘要翻译: 在检查装置中,检查头(105)被支撑为能够相互正交的X方向和Y方向移动,测量头(125,126)被支撑为能够沿Z方向移动 相对于检查头(105)与X方向和Y方向正交,多个第一测量器(127)和多个第二测量器(128)并联布置在测量头(125,126)中 并且可以保持在相对于Z方向前进并退避的提前位置,从而提高检查操作的可操作性。

    HOLE EXAMINING DEVICE
    8.
    发明申请
    HOLE EXAMINING DEVICE 有权
    孔检测装置

    公开(公告)号:US20130192076A1

    公开(公告)日:2013-08-01

    申请号:US13878511

    申请日:2011-11-08

    IPC分类号: G01B3/00

    摘要: In a hole examining device, an examination head (105) is supported to be movable in an X direction and a Y direction which are orthogonal to each other, measurement heads (125, 126) are supported to be movable in a Z direction which is orthogonal to the X direction and the Y direction with respect to the examination head (105), and a plurality of first measurers (127) and a plurality of second measurers (128) are arranged in the measurement heads (125, 126) in parallel and may be held at an advance position which advances as well as retreats with respect to the Z direction, thereby improving workability of an examining operation.

    摘要翻译: 在检查装置中,检查头(105)被支撑为能够相互正交的X方向和Y方向移动,测量头(125,126)被支撑为能够沿Z方向移动 相对于检查头(105)与X方向和Y方向正交,多个第一测量器(127)和多个第二测量器(128)并联布置在测量头(125,126)中 并且可以保持在相对于Z方向前进并退避的提前位置,从而提高检查操作的可操作性。

    PROCESSOR
    9.
    发明申请
    PROCESSOR 有权
    处理器

    公开(公告)号:US20100011195A1

    公开(公告)日:2010-01-14

    申请号:US12498536

    申请日:2009-07-07

    申请人: Masaaki Ishii

    发明人: Masaaki Ishii

    IPC分类号: G06F9/38

    摘要: A processor includes a plurality of executing sections configured to simultaneously execute instructions for a plurality of threads, an instruction issuing section configured to issue instructions to the plurality of executing sections, and an instruction sync monitoring section configured to, when an instruction-synchronizing instruction is issued to one or more of the plurality of executing sections from the instruction issuing section, monitor completion of execution of the instruction-synchronizing instruction for each of the executing sections, to which the instruction-synchronizing instruction has been issued, thus detecting completion of execution of preceding instructions for the thread to which the instruction-synchronizing instruction belongs. After issuing the instruction-synchronizing instruction, the instruction issuing section stops issuance of succeeding instructions for the thread to which the instruction-synchronizing instruction belongs, until the completion of execution of the preceding instructions for the thread to which the instruction-synchronizing instruction belongs is detected by the instruction sync monitoring section.

    摘要翻译: 处理器包括:多个执行部,被配置为同时执行多个线程的指令;指令发布部,被配置为向多个执行部发出指令;指令同步监视部,被配置为当指令同步指令为 从指令发布部分发出到多个执行部分中的一个或多个执行部分,监视对已经发出指令同步指令的每个执行部分的指令同步指令的执行完成,从而检测执行完成 对于指令同步指令所属的线程的先前指令。 在发出指令同步指令之后,指令发布部分停止向指令同步指令所属的线程发出后续指令,直到对指令同步指令所属的线程的前一条指令的执行完成为止 由指令同步监视部分检测。

    Floating-point number arithmetic circuit
    10.
    发明申请
    Floating-point number arithmetic circuit 有权
    浮点数运算电路

    公开(公告)号:US20060112160A1

    公开(公告)日:2006-05-25

    申请号:US11280244

    申请日:2005-11-17

    IPC分类号: G06F7/38

    摘要: Disclosed herein is a floating-point number arithmetic circuit for efficiently supplying data to be performed arithmetic operation. The floating-point number arithmetic circuit includes an floating-point number arithmetic unit for performing a predetermined floating-point number arithmetic operation on a floating-point number of a predetermined precision, and a converting circuit for converting data into the floating-point number of predetermined precision and supplying the floating-point number of the predetermined precision to at least either one of input terminals of the floating-point number arithmetic unit.

    摘要翻译: 这里公开了一种用于有效地提供要进行的算术运算的数据的浮点数运算电路。 浮点数算术电路包括用于对预定精度的浮点数执行预定的浮点数算术运算的浮点数运算单元和用于将数据转换为浮点数运算的浮点数运算单元 预定精度,并将预定精度的浮点数提供给浮点数运算单元的输入端中的至少一个。