公开(公告)号：US06949780B2

公开(公告)日：2005-09-27

申请号：US10847323

申请日：2004-05-18

申请人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

发明人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

IPC分类号： H01L27/10 ,  G11C27/00 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： G11C27/005 ,  G11C11/54 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an electric potential generating device, a source of an N type MIS transistor is mutually connected to that of a P type MIS transistor and also connected to an output terminal. A drain of an N type MIS transistor 54 is connected to a power supply voltage supply portion for supplying power supply voltage VDD, and a drain of the P type MIS transistor is connected to a ground. In addition, a substrate potential of the N type MIS transistor is a ground voltage VSS, and that of a P type MIS transistor 56 is the power supply voltage VDD. Thus, it is constituted as a source follower circuit for taking output out of the source. It is possible, by utilizing this electric potential generating device, to obtain a logic transformation circuit for stably switching between NOR operation and NAND operation.

公开(公告)号：US06844582B2

公开(公告)日：2005-01-18

申请号：US10434358

申请日：2003-05-09

申请人： Michihito Ueda ,  Kenji Toyoda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

发明人： Michihito Ueda ,  Kenji Toyoda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

IPC分类号： G06N3/063 ,  G11C27/00 ,  H01L21/8246 ,  H01L21/8247 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L45/00 ,  H01L29/76 ,  H01L27/108 ,  G06F15/18 ,  G06G7/00

CPC分类号： H01L27/11502 ,  G06N3/0635 ,  G11C11/54 ,  G11C27/00 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11507 ,  H01L27/11521 ,  H01L27/11585 ,  H01L27/1159 ,  H01L27/1203 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/144

摘要： A learning method of a semiconductor device of the present invention comprises a neuro device having a multiplier as a synapse in which a weight varies according to an input weight voltage, and functioning as a neural network system that processes analog data, comprising a step A of inputting predetermined input data to the neuro device and calculating an error between a target value of an output of the neuro device with respect to the input data and an actual output, a step B of calculating variation amount in the error by varying a weight of the multiplier thereafter, and a step C of varying the weight of the multiplier based on the variation amount in the error, wherein in the steps B and C, after inputting a reset voltage for setting the weight to a substantially constant value to the multiplier as the weight voltage, the weight is varied by inputting the weight voltage corresponding to the weight to be varied.

摘要翻译： 本发明的半导体器件的学习方法包括具有倍增器作为突触的神经器件，其中重量根据输入重量电压而变化，并且用作处理模拟数据的神经网络系统，其包括步骤A的步骤A 向神经装置输入预定的输入数据并计算神经装置的输出的目标值相对于输入数据与实际输出之间的误差;步骤B，通过改变神经元的重量来计算误差的变化量; 之后的乘法器，以及基于误差变化量来改变乘法器的权重的步骤C，其中在步骤B和C中，在输入用于将权重设定为基本恒定值的复位电压之后， 重量电压，通过输入与要变化的重量相对应的重量电压来改变重量。

公开(公告)号：US06847071B2

公开(公告)日：2005-01-25

申请号：US10161696

申请日：2002-06-05

申请人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

发明人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

IPC分类号： H01L27/10 ,  G11C27/00 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： G11C27/005 ,  G11C11/54 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an electric potential generating device, a source of an N type MIS transistor is mutually connected to that of a P type MIS transistor and also connected to an output terminal. A drain of an N type MIS transistor 54 is connected to a power supply voltage supply portion for supplying power supply voltage VDD, and a drain of the P type MIS transistor is connected to a ground. In addition, a substrate potential of the N type MIS transistor is a ground voltage VSS, and that of a P type MIS transistor 56 is the power supply voltage VDD. Thus, it is constituted as a source follower circuit for taking output out of the source. It is possible, by utilizing this electric potential generating device, to obtain a logic transformation circuit for stably switching between NOR operation and NAND operation.

摘要翻译： 在电位产生装置中，N型MIS晶体管的源极相互连接到P型MIS晶体管的源极，并且还连接到输出端子。 N型MIS晶体管54的漏极连接到用于提供电源电压VDD的电源电压供应部分，并且P型MIS晶体管的漏极连接到地。 此外，N型MIS晶体管的衬底电位为接地电压VSS，P型MIS晶体管56的衬底电位为电源电压VDD。 因此，它构成为用于从源极输出的源极跟随器电路。 通过利用该电位产生装置可以获得用于在NOR操作和NAND操作之间稳定切换的逻辑变换电路。

公开(公告)号：US06541278B2

公开(公告)日：2003-04-01

申请号：US09492350

申请日：2000-01-27

申请人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

发明人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

IPC分类号： C23C1606

CPC分类号： H01L29/513 ,  C23C16/409 ,  C23C16/4485 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28291 ,  H01L21/31691 ,  H01L29/516 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.

摘要翻译： 将半导体衬底放置在壳体内。 通过将超临界状态的有机金属配合物和二氧化碳供给到壳体中，在铂薄膜上形成BST薄膜，同时除去形成BST薄膜时产生的碳化合物。 碳化合物在超临界二氧化碳中的溶解度非常高，而超临界二氧化碳的粘度低。 因此，碳化合物可从BST薄膜有效地去除。 氧化物或氮化物膜也可以通过使用例如超临界或亚临界状态的水在低温下进行氧化或氮化来形成。

公开(公告)号：US06859381B2

公开(公告)日：2005-02-22

申请号：US10791781

申请日：2004-03-04

申请人： Takashi Ohtsuka ,  Kiyoyuki Morita ,  Michihito Ueda

发明人： Takashi Ohtsuka ,  Kiyoyuki Morita ,  Michihito Ueda

IPC分类号： G11C11/22 ,  G11C16/04 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788

CPC分类号： H01L27/11502 ,  G11C11/22 ,  G11C16/0408 ,  H01L27/11507 ,  H01L29/42324 ,  H01L29/7881

摘要： A nonvolatile semiconductor storage element, which is provided with a floating gate electrode, and a dielectric capacitor and a ferroelectric capacitor both connected to the floating gate electrode. By applying voltage between a first polarization voltage supplying terminal and a second polarization voltage supplying terminal, polarization serving as information is generated in the ferroelectric film of the ferroelectric capacitor. Additionally, when a read-out voltage is applied between the ground terminal and the power source voltage terminal that are in connection with the source and drain regions, the MISFET is turned either on or off in correspondence to the state of the charge held in the floating gate electrode, and thus information within the floating gate electrode is read out.

摘要翻译： 具有浮置栅电极的非易失性半导体存储元件，以及与浮置栅电极连接的介质电容器和强电介质电容器。 通过在第一极化电压供给端子和第二极化电压供给端子之间施加电压，在铁电体电容器的铁电体膜中产生作为信息的极化。 另外，当在与源极和漏极区域连接的接地端子和电源电压端子之间施加读出电压时，与保持在电源电压的电荷的状态相对应地，MISFET被接通或断开 浮栅电极，从而读出浮栅电极内的信息。

公开(公告)号：US06720596B2

公开(公告)日：2004-04-13

申请号：US09977310

申请日：2001-10-16

申请人： Takashi Ohtsuka ,  Kiyoyuki Morita ,  Michihito Ueda

发明人： Takashi Ohtsuka ,  Kiyoyuki Morita ,  Michihito Ueda

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  G11C11/22 ,  G11C16/0408 ,  H01L27/11507 ,  H01L29/42324 ,  H01L29/7881

摘要： A nonvolatile semiconductor storage element, which is provided with a floating gate electrode, and a dielectric capacitor and a ferroelectric capacitor both connected to the floating gate electrode. By applying voltage between a first polarization voltage supplying terminal and a second polarization voltage supplying terminal, polarization serving as information is generated in the ferroelectric film of the ferroelectric capacitor. Additionally, when a read-out voltage is applied between the ground terminal and the power source voltage terminal that are in connection with the source and drain regions, the MISFET is turned either on or off in correspondence to the state of the charge held in the floating gate electrode, and thus information within the floating gate electrode is read out.

摘要翻译： 具有浮置栅电极的非易失性半导体存储元件，以及与浮置栅电极连接的介质电容器和强电介质电容器。 通过在第一极化电压供给端子和第二极化电压供给端子之间施加电压，在铁电体电容器的铁电体膜中产生作为信息的极化。 另外，当在与源极和漏极区域连接的接地端子和电源电压端子之间施加读出电压时，与保持在电源电压的电荷的状态相对应地，MISFET被接通或断开 浮栅电极，从而读出浮栅电极内的信息。

公开(公告)号：US06940740B2

公开(公告)日：2005-09-06

申请号：US10428840

申请日：2003-05-05

申请人： Michihito Ueda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

发明人： Michihito Ueda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

IPC分类号： G11C11/22 ,  G11C11/56 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788

CPC分类号： H01L27/11502 ,  G11C11/22 ,  G11C11/223 ,  G11C11/54 ,  G11C11/5657 ,  H01L27/105 ,  H01L27/11507 ,  H01L29/7881

摘要： A semiconductor device includes: a control-voltage supply unit 110; an MOS transistor including a gate electrode 109 and drain and source regions 103a and 103b; a dielectric capacitor 104; and a resistor 106. The dielectric capacitor 104 and the resistor 106 are disposed in parallel and interposed between the gate electrode 109 and the control-voltage supply unit 110. With this structure, a charge is accumulated in each of an intermediate electrode of the dielectric capacitor 104 and the gate electrode 109 upon the application of a voltage, thereby varying a threshold value of the MOS transistor. In this manner, the history of input signals can be stored as a variation in a drain current in the MOS transistor, thus allowing multilevel information to be held.

摘要翻译： 半导体器件包括：控制电压提供单元110; 包括栅电极109和漏极和源极区103a和103b的MOS晶体管; 介质电容器104; 和电阻器106。 介质电容器104和电阻器106并联设置并插入在栅电极109和控制电压供给单元110之间。 利用这种结构，在施加电压时，介质电容器104和栅电极109的中间电极中的每一个中积累电荷，从而改变MOS晶体管的阈值。 以这种方式，可以将输入信号的历史存储为MOS晶体管中的漏极电流的变化，从而允许保持多电平信息。

公开(公告)号：US06716663B2

公开(公告)日：2004-04-06

申请号：US10230258

申请日：2002-08-29

申请人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

发明人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

IPC分类号： H01L2100

CPC分类号： H01L29/513 ,  C23C16/409 ,  C23C16/4485 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28291 ,  H01L21/31691 ,  H01L29/516 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed, are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.

摘要翻译： 将半导体衬底放置在壳体内。 通过将超临界状态的有机金属配合物和二氧化碳供给到壳体中，在铂薄膜上形成BST薄膜，同时除去形成BST薄膜时产生的碳化合物。 碳化合物在超临界二氧化碳中的溶解度非常高，而超临界二氧化碳的粘度低。 因此，碳化合物可从BST薄膜有效地去除。 氧化物或氮化物膜也可以通过使用例如超临界或亚临界状态的水在低温下进行氧化或氮化来形成。

公开(公告)号：US07022530B2

公开(公告)日：2006-04-04

申请号：US10311292

申请日：2002-04-03

申请人： Kiyoyuki Morita ,  Shoji Miyake ,  Michihito Ueda ,  Takashi Ohtsuka ,  Takashi Nishikawa

发明人： Kiyoyuki Morita ,  Shoji Miyake ,  Michihito Ueda ,  Takashi Ohtsuka ,  Takashi Nishikawa

IPC分类号： H01G7/06

CPC分类号： H01L29/802 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092 ,  H01L27/10873 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/1203 ,  H01L27/1214 ,  H01L27/1222 ,  H01L28/55 ,  H01L29/1054 ,  H01L29/783 ,  H01L29/78687

摘要： A silicon oxide film 102, a Pt film 103x, a Ti film 104x and a PZT film 105x are deposited in this order over a Si substrate 101. The Si substrate 101 is placed in a chamber 106 so that the PZT film 105x is irradiated with an EHF wave 108. The irradiation with the EHF wave locally heats a dielectric film such as the PZT film. As a result, it is possible to improve, for example, the leakage property of the dielectric film without adversely affecting a device formed on the Si substrate 101.

摘要翻译： 依次沉积硅衬底101上的氧化硅膜102，Pt膜103x，Ti膜104x和PZT膜105x。 将Si衬底101放置在室106中，使得PZT膜105x被EHF波108照射。 用EHF波照射局部加热电介质膜，例如PZT膜。 结果，可以改善例如电介质膜的泄漏特性，而不会对形成在Si衬底101上的器件产生不利影响。

公开(公告)号：US06713316B2

公开(公告)日：2004-03-30

申请号：US10230249

申请日：2002-08-29

申请人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

发明人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

IPC分类号： H01L2100

CPC分类号： H01L29/513 ,  C23C16/409 ,  C23C16/4485 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28291 ,  H01L21/31691 ,  H01L29/516 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed, are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.