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    INTEGRATED CIRCUIT PACKAGE MODULE INCLUDING A BONDING SYSTEM
    2.
    发明申请
    INTEGRATED CIRCUIT PACKAGE MODULE INCLUDING A BONDING SYSTEM 有权

    公开(公告)号：US20230099856A1

    公开(公告)日：2023-03-30

    申请号：US17665749

    申请日：2022-02-07

    Applicant: Microchip Technology Incorporated

    Inventor： Justin Sato ,  Bomy Chen ,  Yaojian Leng ,  Julius Kovats

    IPC: H01L23/498 ,  H01L23/50 ,  H01L25/065

    Abstract: An integrated circuit package module includes an integrated circuit package device including a contact element, and a bonding system formed on the integrated circuit package device. The bonding system includes a bonding system substrate and a bonding element formed in the bonding system substrate and conductively coupled to the contact element of the integrated circuit package device. The bonding element includes (a) a conduction component conductively connected to the contact element, the conduction component formed from a first metal having a first melting point, and (b) a bonding component formed from a second metal having a second melting point lower than the first melting point of the first metal.

    INTEGRATED CIRCUIT DEVICE INCLUDING DIES ARRANGED FACE-TO-FACE
    3.
    发明申请
    INTEGRATED CIRCUIT DEVICE INCLUDING DIES ARRANGED FACE-TO-FACE 有权

    公开(公告)号：US20250054912A1

    公开(公告)日：2025-02-13

    申请号：US18540971

    申请日：2023-12-15

    Applicant: Microchip Technology Incorporated

    Inventor： Julius Kovats

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498

    Abstract: A method of forming an integrated circuit (IC) device includes forming a first die block including a first die block substrate, a first die at least partially embedded in the first die block substrate, first die contacts located in a first die footprint, and first die block contacts laterally outside the first die footprint. A second die having a larger footprint than the first die footprint, and including second die inner contacts and second die outer contacts, is arranged face-to-face and spatially aligned relative to the first die. The second die is bonded to the first die block by a bonding process including (a) bonding respective second die inner contacts to respective first die contacts to define inner electrical connections between the first and second dies and (b) bonding respective second die outer contacts to respective first die block contacts to define outer electrical connections outside the first die footprint.

    INTEGRATED CIRCUIT DEVICE
    8.
    发明申请
    INTEGRATED CIRCUIT DEVICE 有权

    公开(公告)号：US20250096060A1

    公开(公告)日：2025-03-20

    申请号：US18585335

    申请日：2024-02-23

    Applicant: Microchip Technology Incorporated

    Inventor： Mankit Lam ,  Julius Kovats

    IPC: H01L23/42 ,  H01L23/00 ,  H01L25/16

    Abstract: An integrated circuit (IC) device includes a die including a silicon region having a coefficient of thermal expansion (CTEsilicon), and a conductive contact on a first side of the first die. An encapsulant laterally adjacent the silicon region of the first die has a coefficient of thermal expansion (CTEencapsulant), wherein a mismatch between the CTEsilicon and the CTEencapsulant defines a thermal stress interface between the silicon region and the encapsulant. The IC device includes a dielectric layer formed over the first die and the encapsulant, and includes a dielectric spacer region extending over and laterally across the thermal stress interface. The IC device includes a redistribution layer (RDL) including an RDL element formed over the dielectric spacer region and electrically connected to the conductive contact through an opening in the dielectric layer, wherein the RDL element is physically spaced apart from the thermal stress interface by the dielectric spacer region.

    Integrated circuit bond pad with multi-material toothed structure
    9.
    发明授权
    Integrated circuit bond pad with multi-material toothed structure 有权

    公开(公告)号：US12205910B2

    公开(公告)日：2025-01-21

    申请号：US18141621

    申请日：2023-05-01

    Applicant: Microchip Technology Incorporated

    Inventor： Justin Sato ,  Bomy Chen ,  Yaojian Leng ,  Gerald Marsico ,  Julius Kovats

    IPC: H01L21/60 ,  H01L23/00

    Abstract: An integrated circuit device may include a multi-material toothed bond pad including (a) an array of vertically-extending teeth formed from a first material, e.g., aluminum, and (b) a fill material, e.g., silver, at least partially filling voids between the array of teeth. The teeth may be formed by depositing and etching aluminum or other suitable material, and the fill material may be deposited over the array of teeth and extending down into the voids between the teeth, and etched to expose top surfaces of the teeth. The array of teeth may collectively define an abrasive structure. The multi-material toothed bond pad may be bonded to another bond pad, e.g., using an ultrasonic or thermosonic bonding process, during which the abrasive teeth may abrade, break, or remove unwanted native oxide layers formed on the respective bond pad surfaces, to thereby create a direct and/or eutectic bonding between the bond pads.

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