公开(公告)号：US08754401B2

公开(公告)日：2014-06-17

申请号：US12870922

申请日：2010-08-30

申请人： Mikael T Bjoerk ,  Oliver Hayden ,  Joachim Knoch ,  Emanuel Loertscher ,  Heike E Riel ,  Walter Heinrich Riess ,  Heinz Schmid

发明人： Mikael T Bjoerk ,  Oliver Hayden ,  Joachim Knoch ,  Emanuel Loertscher ,  Heike E Riel ,  Walter Heinrich Riess ,  Heinz Schmid

IPC分类号： H01L29/06 ,  H01L31/00

CPC分类号： H01L29/7391 ,  H01L29/0665

摘要： An Impact Ionization Field-Effect Transistor (I-MOS) device in which device degradation caused by hot carrier injection into a gate oxide is prevented. The device includes source, drain, and gate contacts, and a channel between the source and the drain. The channel has a dimension normal to the direction of a charge carrier transport in the channel such that the energy separation of the first two sub-bands equals or exceeds the effective energy band gap of the channel material.

摘要翻译： 防止热载流子注入到栅极氧化物中的器件劣化的冲击电离场效应晶体管（I-MOS）器件。 该器件包括源极，漏极和栅极触点，以及源极和漏极之间的通道。 通道具有与通道中电荷载流子传输方向相垂直的维度，使得前两个子带的能量分离等于或超过通道材料的有效能带隙。

公开(公告)号：US08193524B2

公开(公告)日：2012-06-05

申请号：US12564091

申请日：2009-09-22

申请人： Mikael T Bjoerk ,  Joachim Knoch ,  Heike E Riel ,  Walter Heinrich Riess ,  Heinz Schmid

发明人： Mikael T Bjoerk ,  Joachim Knoch ,  Heike E Riel ,  Walter Heinrich Riess ,  Heinz Schmid

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/20

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/125 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78642 ,  H01L29/78696 ,  H01L2924/0002 ,  Y10S977/762 ,  H01L2924/00

摘要： An electronic device and method of manufacturing the device. The device includes a semiconducting region, which can be a nanowire, a first contact electrically coupled to the semiconducting region, and at least one second contact capacitively coupled to the semiconducting region. At least a portion of the semiconducting region between the first contact and the second contact is covered with a dipole layer. The dipole layer can act as a local gate on the semiconducting region to enhance the electric properties of the device.

摘要翻译： 电子装置及其制造方法。 器件包括半导体区域，其可以是纳米线，电耦合到半导体区域的第一接触点和电容耦合到半导体区域的至少一个第二接触点。 第一触点和第二触点之间的半导体区域的至少一部分被偶极子层覆盖。 偶极层可以用作半导体区域上的局部栅极，以增强器件的电性能。

公开(公告)号：US07686886B2

公开(公告)日：2010-03-30

申请号：US11535122

申请日：2006-09-26

申请人： Walter H Riess ,  Heike E Riel ,  Siegfried F Karg ,  Heinz Schmid

发明人： Walter H Riess ,  Heike E Riel ,  Siegfried F Karg ,  Heinz Schmid

IPC分类号： C30B25/00

CPC分类号： C30B29/60 ,  Y10S117/902

摘要： A method for forming a structure of a desired cross-section on a substrate is provided. The method provides a seed structure comprising at least one support layer on the substrate. The support layer has a geometric shape related to the desired cross-section of the structure and is diffusive to a precursor constituent. The method further includes growing the structure by supplying at least one precursor constituent on the substrate. The desired cross-section of the structure is defined by the geometric shape of at least one support layer.

摘要翻译： 提供了一种在基板上形成所需横截面结构的方法。 该方法提供了在基底上包括至少一个支撑层的种子结构。 支撑层具有与结构的期望横截面相关的几何形状并且扩散到前体成分。 该方法还包括通过在衬底上提供至少一种前体成分来生长该结构。 结构的期望横截面由至少一个支撑层的几何形状限定。

公开(公告)号：US20090275191A1

公开(公告)日：2009-11-05

申请号：US11532551

申请日：2006-09-18

申请人： Jonas R Weiss ,  Thomas E. Morf ,  Heike E Riel

发明人： Jonas R Weiss ,  Thomas E. Morf ,  Heike E Riel

IPC分类号： H01L21/768

CPC分类号： H01L23/60 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/10126 ,  H01L2224/11821 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/1184 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/1312 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13171 ,  H01L2224/13172 ,  H01L2224/13184 ,  H01L2224/13187 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13601 ,  H01L2224/13617 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13687 ,  H01L2224/1369 ,  H01L2224/165 ,  H01L2224/81002 ,  H01L2224/81007 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30205 ,  H01L2924/04941 ,  H01L2924/01003 ,  H01L2924/0535 ,  H01L2924/07812

摘要： A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between contacts, provides a carrier substrate that is then bonded to the chip die and then the conductive coating is deactivated to ready the device for use. The deactivation of the conductive coating may involve physical removal of the conductive coating (or a portion thereof), oxidation of the conductive coating to form a non-conductive coating, or some other process to interrupt the conductive path between contacts. The apparatus of the invention is a chip having a temporary conductive coating deposited thereon to protect the integrated circuit from ESD events.

摘要翻译： 一种用于使用临时导电涂层提供集成电路的ESD保护的方法和装置。 该方法将待保护的触点之间的临时导电涂层沉积在芯片芯片上，使得在触点之间产生导电路径，提供随后结合到芯片模具的载体基板，然后导电涂层停用以准备该装置 使用。 导电涂层的失活可以涉及导电涂层（或其一部分）的物理去除，导电涂层的氧化以形成非导电涂层，或者一些其它中断接触之间的导电路径的过程。 本发明的装置是其上沉积有临时导电涂层的芯片，以保护集成电路免受ESD事件的影响。

公开(公告)号：US07629202B2

公开(公告)日：2009-12-08

申请号：US11532551

申请日：2006-09-18

申请人： Jonas R Weiss ,  Thomas E. Morf ,  Heike E Riel

发明人： Jonas R Weiss ,  Thomas E. Morf ,  Heike E Riel

IPC分类号： H10L21/44

CPC分类号： H01L23/60 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/10126 ,  H01L2224/11821 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/1184 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/1312 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13171 ,  H01L2224/13172 ,  H01L2224/13184 ,  H01L2224/13187 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13601 ,  H01L2224/13617 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13687 ,  H01L2224/1369 ,  H01L2224/165 ,  H01L2224/81002 ,  H01L2224/81007 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30205 ,  H01L2924/04941 ,  H01L2924/01003 ,  H01L2924/0535 ,  H01L2924/07812

摘要： A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between contacts, provides a carrier substrate that is then bonded to the chip die and then the conductive coating is deactivated to ready the device for use. The deactivation of the conductive coating may involve physical removal of the conductive coating (or a portion thereof), oxidation of the conductive coating to form a non-conductive coating, or some other process to interrupt the conductive path between contacts. The apparatus of the invention is a chip having a temporary conductive coating deposited thereon to protect the integrated circuit from ESD events.

摘要翻译： 一种用于使用临时导电涂层提供集成电路的ESD保护的方法和装置。 该方法将待保护的触点之间的临时导电涂层沉积在芯片芯片上，使得在触点之间产生导电路径，提供随后结合到芯片模具的载体基板，然后导电涂层停用以准备该装置 使用。 导电涂层的失活可以涉及导电涂层（或其一部分）的物理去除，导电涂层的氧化以形成非导电涂层，或者一些其它中断接触之间的导电路径的过程。 本发明的装置是其上沉积有临时导电涂层的芯片，以保护集成电路免受ESD事件的影响。