摘要:
A semiconductor package includes a semiconductor die and a redistribution structure. The semiconductor die is laterally surrounded by a molding compound, and the semiconductor die has a conductive pillar and a complex compound sheath sandwiched between the conductive pillar and the molding compound. The redistribution structure is electrically connected with the semiconductor die and comprises a first via portion at a first side of the redistribution structure and a second via portion at a second side of the redistribution structure, and a base angle of the second via portion is greater than a base angle of the first via portion.
摘要:
A method of fabricating a wafer-level chip package is provided. First, a wafer with two adjacent chips is provided, the wafer having an upper surface and a lower surface, and one side of each chip includes a conducting pad on the lower surface. A recess and an isolation layer extend from the upper surface to the lower surface, which the recess exposes the conducting pad. A part of the isolation layer is disposed in the recess with an opening to expose the conducting pad. A conductive layer is formed on the isolation layer and the conductive pad, and a photo-resist layer is spray coated on the conductive layer. The photo-resist layer is exposed and developed to expose the conductive layer, and the conductive layer is etched to form a redistribution layer. After stripping the photo-resist layer, a solder layer is formed on the isolation layer and the redistribution layer.
摘要:
A semiconductor package includes a semiconductor die and a redistribution structure. The semiconductor die is laterally surrounded by a molding compound, and the semiconductor die has a conductive pillar and a complex compound sheath sandwiched between the conductive pillar and the molding compound. The redistribution structure is electrically connected with the semiconductor die and comprises a first via portion at a first side of the redistribution structure and a second via portion at a second side of the redistribution structure, and a base angle of the second via portion is greater than a base angle of the first via portion.
摘要:
Devices employing semiconductor die having hydrophobic coatings, and related cooling methods are disclosed. A device may include at least one semiconductor die electrically coupled to a substrate by electrical contact elements. During operation the semiconductor die and the electrical contact elements generate heat. By applying hydrophobic coatings to the semiconductor die and the electrical contact elements, a cooling fluid may be used to directly cool the semiconductor die and the electrical contact elements to maintain these components within temperature limits and free from electrical shorting and corrosion. In this manner, the semiconductor die and associated electrical contact elements may be cooled to avoid the creation of damaging localized hot spots and temperature-sensitive semiconductor performance issues.
摘要:
Devices employing semiconductor die having hydrophobic coatings, and related cooling methods are disclosed. A device may include at least one semiconductor die electrically coupled to a substrate by electrical contact elements. During operation the semiconductor die and the electrical contact elements generate heat. By applying hydrophobic coatings to the semiconductor die and the electrical contact elements, a cooling fluid may be used to directly cool the semiconductor die and the electrical contact elements to maintain these components within temperature limits and free from electrical shorting and corrosion. In this manner, the semiconductor die and associated electrical contact elements may be cooled to avoid the creation of damaging localized hot spots and temperature-sensitive semiconductor performance issues.
摘要:
A method of making an assembly includes the steps of applying metallic nanoparticles to exposed surfaces of conductive elements of either of or both of a first component and a second component, juxtaposing the conductive elements of the first component with the conductive elements of the second component with the metallic nanoparticles disposed therebetween, and elevating a temperature at least at interfaces of the juxtaposed conductive elements to a joining temperature at which the metallic nanoparticles cause metallurgical joints to form between the juxtaposed conductive elements. The conductive elements of either of or both of the first component and the second component can include substantially rigid posts having top surfaces projecting a height above the surface of the respective component and edge surfaces extending at substantial angles away from the top surfaces thereof.
摘要:
Provided are a soldering device and method which allow for oldering at low cost with high yield and high reliability. To solve the above problems, the soldering device has: a first processing section that immerses workpiece member 10 having copper electrode 2 in organic fatty acid-containing solution, and horizontally move immersed workpiece member 10 in organic fatty acid-containing solution 31; a second processing section having ejection unit 33 to spray a jet stream of molten solder 5a to workpiece member 10 while pulling out workpiece member 10 processed in the first processing section to space section 24 that has a pressurized steam atmosphere and is provided above organic fatty acid-containing solution 31; a third processing section having ejection unit 34 to spray organic fatty acid-containing solution 31 to excess molten solder 5a on workpiece member 10 for removal while pulling down workpiece member 10 processed in the second processing section after horizontally moving in space section 24; and a fourth processing section that picks up workpiece member 10 processed in the third processing section by pulling out from organic fatty acid-containing solution 31 after horizontally moving in organic fatty acid-containing solution 31.
摘要:
A method of making an assembly includes the steps of applying metallic nanoparticles to exposed surfaces of conductive elements of either of or both of a first component and a second component, juxtaposing the conductive elements of the first component with the conductive elements of the second component with the metallic nanoparticles disposed therebetween, and elevating a temperature at least at interfaces of the juxtaposed conductive elements to a joining temperature at which the metallic nanoparticles cause metallurgical joints to form between the juxtaposed conductive elements. The conductive elements of either of or both of the first component and the second component can include substantially rigid posts having top surfaces projecting a height above the surface of the respective component and edge surfaces extending at substantial angles away from the top surfaces thereof.
摘要:
A method for forming direct metal-metal bond between metallic surfaces is disclosed. The method comprises depositing a first nanostructured organic coating (118) on a first metallic surface (116) to form a first passivation layer thereon, the first nanostructured organic coating (118) comprising an organic phase with nanoparticles dispersed within the organic phase, contacting the first nanostructured organic coating (118) with a second metallic surface (126), and applying on the first and second metallic surfaces (116, 126) at least a bonding temperature of at least room temperature and/or a bonding pressure for a bonding period to bond the first and second metallic surfaces (116, 126) thereby forming the direct metal-metal bond therebetween. A second nanostructured organic coating (128) comprising an organic phase with nanoparticles dispersed within the organic phase may also be deposited on the second metallic surface (126).
摘要:
A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between contacts, provides a carrier substrate that is then bonded to the chip die and then the conductive coating is deactivated to ready the device for use. The deactivation of the conductive coating may involve physical removal of the conductive coating (or a portion thereof), oxidation of the conductive coating to form a non-conductive coating, or some other process to interrupt the conductive path between contacts. The apparatus of the invention is a chip having a temporary conductive coating deposited thereon to protect the integrated circuit from ESD events.