公开(公告)号：US20070287247A1

公开(公告)日：2007-12-13

申请号：US11422701

申请日：2006-06-07

Applicant: Ming-Chyi Liu ,  Chi-Hsin Lo

Inventor： Ming-Chyi Liu ,  Chi-Hsin Lo

IPC: H01L21/8244

CPC classification number: H01L28/60 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76813 ,  H01L27/10852 ,  H01L27/10855

Abstract: A semiconductor device with an embedded capacitor structure. A dielectric layer is disposed on a substrate, having a contact opening exposing the substrate and a trench opening above the contact opening. A first metal electrode layer is conformally disposed over the sidewalls and bottoms of the contact and trench openings. A second metal electrode layer is conformally disposed over the sidewalls and bottoms of the contact and trench openings. A capacitor dielectric layer is interposed between the first and second metal electrode layers. A method for fabricating the semiconductor device is also disclosed.

Abstract translation: 具有嵌入式电容器结构的半导体器件。 介电层设置在基板上，具有暴露基板的接触开口和接触开口上方的沟槽开口。 第一金属电极层共形地设置在触点和沟槽开口的侧壁和底部之上。 第二金属电极层共形地设置在触点和沟槽开口的侧壁和底部之上。 电容器电介质层介于第一和第二金属电极层之间。 还公开了制造半导体器件的方法。

公开(公告)号：US08188527B2

公开(公告)日：2012-05-29

申请号：US11422701

申请日：2006-06-07

Applicant: Ming-Chyi Liu ,  Chi-Hsin Lo

Inventor： Ming-Chyi Liu ,  Chi-Hsin Lo

IPC: H01L27/108

CPC classification number: H01L28/60 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76813 ,  H01L27/10852 ,  H01L27/10855

Abstract: A semiconductor device with an embedded capacitor structure. A dielectric layer is disposed on a substrate, having a contact opening exposing the substrate and a trench opening above the contact opening. A first metal electrode layer is conformally disposed over the sidewalls and bottoms of the contact and trench openings. A second metal electrode layer is conformally disposed over the sidewalls and bottoms of the contact and trench openings. A capacitor dielectric layer is interposed between the first and second metal electrode layers. A method for fabricating the semiconductor device is also disclosed.

Abstract translation: 具有嵌入式电容器结构的半导体器件。 介电层设置在基板上，具有暴露基板的接触开口和接触开口上方的沟槽开口。 第一金属电极层共形地设置在触点和沟槽开口的侧壁和底部之上。 第二金属电极层共形地设置在触点和沟槽开口的侧壁和底部之上。 电容器电介质层介于第一和第二金属电极层之间。 还公开了制造半导体器件的方法。

公开(公告)号：US20080124912A1

公开(公告)日：2008-05-29

申请号：US11461673

申请日：2006-08-01

Applicant: Yuan-Hung Liu ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

Inventor： Yuan-Hung Liu ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC: H01L21/4763

CPC classification number: H01L21/02274 ,  H01L21/02115 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76885 ,  H01L21/76897 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/14632 ,  H01L27/14687 ,  H01L28/91 ,  H01L29/40114 ,  H01L29/42328 ,  H01L29/7881

Abstract: A method includes the steps of: (a) forming a conductive layer within a dielectric layer formed over a substrate; (b) forming a material layer over the conductive layer and the dielectric layer; (c) forming an opening within the material layer by an etch process to expose a portion of the dielectric layer and a top surface of the conductive layer; (d) forming a first metal-containing layer within the opening substantially covering sidewalls of the material layer and the exposed portion of the second dielectric layer; and (e) removing the material layer by an oxygen-containing plasma process to expose a portion of outer sidewalls of the first metal-containing layer.

Abstract translation: 一种方法包括以下步骤：（a）在形成在衬底上的电介质层内形成导电层; （b）在导电层和电介质层上形成材料层; （c）通过蚀刻工艺在所述材料层内形成开口以暴露所述电介质层的一部分和所述导电层的顶表面; （d）在所述开口内形成基本上覆盖所述材料层的侧壁和所述第二介电层的暴露部分的第一含金属层; 和（e）通过含氧等离子体方法去除所述材料层以暴露所述第一含金属层的外侧壁的一部分。

公开(公告)号：US07691696B2

公开(公告)日：2010-04-06

申请号：US12048006

申请日：2008-03-13

Applicant: Ming-Chyi Liu ,  Chi-Hsin Lo

Inventor： Ming-Chyi Liu ,  Chi-Hsin Lo

IPC: H01L21/336 ,  H01L21/8234

CPC classification number: G02B3/0012 ,  B29D11/00278

Abstract: Hemi-spherical structure and method for fabricating the same. A device includes discrete pillar regions on a substrate, and a pattern layer on the discrete support structures and the substrate. The pattern layer has hemi-spherical film regions on the discrete support structures respectively, and planarized portions on the substrate between the hemi-spherical film regions. Each of the hemi-spherical film regions in a position corresponding to each of the support structures serves as a hemi-spherical structure.

Abstract translation: 半球形结构及其制造方法。 一种器件包括在衬底上的离散柱状区域，以及分立的支撑结构和衬底上的图案层。 图案层分别在离散支撑结构上具有半球形膜区域，并且在半球形膜区域之间的衬底上的平坦化部分。 在与每个支撑结构相对应的位置中的每个半球形膜区域用作半球形结构。

公开(公告)号：US20090124073A1

公开(公告)日：2009-05-14

申请号：US12354171

申请日：2009-01-15

Applicant: Ming-Chyi Liu ,  Yuan-Hung Liu ,  Gwo-Yuh Shiau ,  Yuan-Chih Hsieh ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

Inventor： Ming-Chyi Liu ,  Yuan-Hung Liu ,  Gwo-Yuh Shiau ,  Yuan-Chih Hsieh ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC: H01L21/768

CPC classification number: H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L27/14636 ,  H01L27/14643 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45166 ,  H01L2224/4807 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/45124 ,  H01L2224/05655 ,  H01L2924/00

Abstract: A method for forming a semiconductor device with a bonding pad is disclosed. A first substrate having a device area and a bonding area is provided, wherein the first substrate has an upper surface and a bottom surface. Semiconductor elements are formed on the upper surface of the first substrate in the device area. A first inter-metal dielectric layer is formed on the upper surface of the substrate in the bonding area. A lowermost metal pattern is formed in the first inter-metal dielectric layer, wherein the lowermost metal pattern serves as the bonding pad. An opening through the first substrate is formed to expose the lowermost metal pattern.

Abstract translation: 公开了一种用焊盘形成半导体器件的方法。 提供具有器件面积和接合面积的第一衬底，其中第一衬底具有上表面和底表面。 半导体元件形成在器件区域中的第一衬底的上表面上。 在接合区域中的基板的上表面上形成第一金属间介电层。 在第一金属间介质层中形成最下面的金属图案，其中最下面的金属图形用作接合焊盘。 形成通过第一基板的开口以露出最下面的金属图案。

公开(公告)号：US07883917B2

公开(公告)日：2011-02-08

申请号：US12354171

申请日：2009-01-15

Applicant: Ming-Chyi Liu ,  Yuan-Hung Liu ,  Gwo-Yuh Shiau ,  Yuan-Chih Hsieh ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

Inventor： Ming-Chyi Liu ,  Yuan-Hung Liu ,  Gwo-Yuh Shiau ,  Yuan-Chih Hsieh ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC: H01L21/00

CPC classification number: H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L27/14636 ,  H01L27/14643 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45166 ,  H01L2224/4807 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/45124 ,  H01L2224/05655 ,  H01L2924/00

Abstract: A method for forming a semiconductor device with a bonding pad is disclosed. A first substrate having a device area and a bonding area is provided, wherein the first substrate has an upper surface and a bottom surface. Semiconductor elements are formed on the upper surface of the first substrate in the device area. A first inter-metal dielectric layer is formed on the upper surface of the substrate in the bonding area. A lowermost metal pattern is formed in the first inter-metal dielectric layer, wherein the lowermost metal pattern serves as the bonding pad. An opening through the first substrate is formed to expose the lowermost metal pattern.

Abstract translation: 公开了一种用焊盘形成半导体器件的方法。 提供具有器件面积和接合面积的第一衬底，其中第一衬底具有上表面和底表面。 半导体元件形成在器件区域中的第一衬底的上表面上。 在接合区域中的基板的上表面上形成第一金属间介电层。 在第一金属间介质层中形成最下面的金属图案，其中最下面的金属图形用作接合焊盘。 形成通过第一基板的开口以露出最下面的金属图案。

公开(公告)号：US07824998B2

公开(公告)日：2010-11-02

申请号：US12357661

申请日：2009-01-22

Applicant: Yuan-Hung Liu ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

Inventor： Yuan-Hung Liu ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC: H01L21/20

CPC classification number: H01L21/02274 ,  H01L21/02115 ,  H01L21/28273 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76885 ,  H01L21/76897 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/14632 ,  H01L27/14687 ,  H01L28/91 ,  H01L29/42328 ,  H01L29/7881

Abstract: A method includes forming an amorphous carbon layer over a first dielectric layer formed over a substrate, forming a second dielectric layer over the amorphous carbon layer; and forming an opening within the amorphous carbon layer and second dielectric layer by a first etch process to partially expose a top surface of the first dielectric layer. A substantially conformal metal-containing layer is formed over the second dielectric layer and within the opening. The second dielectric layer and a portion of the metal-containing layer are removed. The amorphous carbon layer is removed by an oxygen-containing plasma process to expose a top surface of the first dielectric layer. An insulating layer is formed over the metal-containing layer, and a second metal-containing layer is formed over the insulating layer to form a capacitor.

Abstract translation: 一种方法包括在形成在衬底上的第一电介质层上形成无定形碳层，在非晶碳层上形成第二电介质层; 以及通过第一蚀刻工艺在所述非晶碳层和所述第二介电层内形成开口，以部分地暴露所述第一介电层的顶表面。 在第二电介质层上并在开口内形成基本上共形的含金属层。 去除第二电介质层和一部分含金属层。 通过含氧等离子体工艺除去无定形碳层以暴露第一介电层的顶表面。 在含金属层的上方形成有绝缘层，在绝缘层上形成第二含金属层，形成电容器。

公开(公告)号：US20090130814A1

公开(公告)日：2009-05-21

申请号：US12357661

申请日：2009-01-22

Applicant: Yuan-Hung LIU ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chai-Shiung Tsai

Inventor： Yuan-Hung LIU ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chai-Shiung Tsai

IPC: H01L21/20

CPC classification number: H01L21/02274 ,  H01L21/02115 ,  H01L21/28273 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76885 ,  H01L21/76897 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/14632 ,  H01L27/14687 ,  H01L28/91 ,  H01L29/42328 ,  H01L29/7881

Abstract: A method includes forming an amorphous carbon layer over a first dielectric layer formed over a substrate, forming a second dielectric layer over the amorphous carbon layer; and forming an opening within the amorphous carbon layer and second dielectric layer by a first etch process to partially expose a top surface of the first dielectric layer. A substantially conformal metal-containing layer is formed over the second dielectric layer and within the opening. The second dielectric layer and a portion of the metal-containing layer are removed. The amorphous carbon layer is removed by an oxygen-containing plasma process to expose a top surface of the first dielectric layer. An insulating layer is formed over the metal-containing layer, and a second metal-containing layer is formed over the insulating layer to form a capacitor.

Abstract translation: 一种方法包括在形成在衬底上的第一电介质层上形成无定形碳层，在非晶碳层上形成第二电介质层; 以及通过第一蚀刻工艺在所述非晶碳层和所述第二介电层内形成开口，以部分地暴露所述第一介电层的顶表面。 在第二电介质层上并在开口内形成基本上共形的含金属层。 去除第二电介质层和一部分含金属层。 通过含氧等离子体工艺除去无定形碳层以暴露第一介电层的顶表面。 在含金属层的上方形成有绝缘层，在绝缘层上形成第二含金属层，形成电容器。

公开(公告)号：US20070155066A1

公开(公告)日：2007-07-05

申请号：US11324250

申请日：2006-01-04

Applicant: Ming-Chyi Liu ,  Chi-Hsin Lo

Inventor： Ming-Chyi Liu ,  Chi-Hsin Lo

IPC: H01L21/84

CPC classification number: G02B3/0012 ,  B29D11/00278

Abstract: Hemi-spherical structure and method for fabricating the same. A device includes discrete pillar regions on a substrate, and a pattern layer on the discrete support structures and the substrate. The pattern layer has hemi-spherical film regions on the discrete support structures respectively, and planarized portions on the substrate between the hemi-spherical film regions. Each of the hemi-spherical film regions in a position corresponding to each of the support structures serves as a hemi-spherical structure.

Abstract translation: 半球形结构及其制造方法。 一种器件包括在衬底上的离散柱状区域，以及分立的支撑结构和衬底上的图案层。 图案层分别在离散支撑结构上具有半球形膜区域，并且在半球形膜区域之间的衬底上的平坦化部分。 在与每个支撑结构相对应的位置中的每个半球形膜区域用作半球形结构。

公开(公告)号：US20080246152A1

公开(公告)日：2008-10-09

申请号：US11696296

申请日：2007-04-04

Applicant: Ming-Chyi Liu ,  Yuan-Hung Liu ,  Gwo-Yuh Shiau ,  Yuan-Chih Hsieh ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

Inventor： Ming-Chyi Liu ,  Yuan-Hung Liu ,  Gwo-Yuh Shiau ,  Yuan-Chih Hsieh ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L27/14636 ,  H01L27/14643 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45166 ,  H01L2224/4807 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/45124 ,  H01L2224/05655 ,  H01L2924/00

Abstract: A semiconductor device with a bonding pad is provided. The semiconductor device includes a first substrate having a device area and a bonding area, wherein the first substrate has an upper surface and a bottom surface. Semiconductor elements are disposed on the upper surface of the first substrate in the device area. A first inter-metal dielectric layer is disposed on the upper surface of the substrate in the bonding area. A lowermost metal pattern is disposed in the first inter-metal dielectric layer, wherein the lowermost metal pattern serves as the bonding pad, and the first substrate is exposed through an opening in the lowermost metal pattern.

Abstract translation: 提供具有接合焊盘的半导体器件。 半导体器件包括具有器件面积和接合面积的第一衬底，其中第一衬底具有上表面和底表面。 半导体元件设置在器件区域中的第一衬底的上表面上。 在接合区域中的第一金属间介电层设置在基板的上表面上。 最下面的金属图案设置在第一金属间介质层中，其中最下面的金属图形用作接合焊盘，第一基板通过最下面的金属图案中的开口露出。