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    Semiconductor device and method for the same
    3.
    发明申请
    Semiconductor device and method for the same 审中-公开
    半导体装置及其方法相同

    公开(公告)号：US20090051034A1

    公开(公告)日：2009-02-26

    申请号：US11892103

    申请日：2007-08-20

    申请人： Chih-Yang Pai ,  Yuan-Hung Liu ,  Michael Kuang ,  Kuo-Ching Huang

    发明人： Chih-Yang Pai ,  Yuan-Hung Liu ,  Michael Kuang ,  Kuo-Ching Huang

    IPC分类号： H01L23/52 ,  H01L21/44

    CPC分类号： H01L27/10888 ,  H01L21/76844

    摘要： A method for forming a semiconductor device is provided. The method includes the following steps. A substrate having a first contact is provided. A layered structure is formed on the substrate. A recess is formed into the layered structure to expose at least a portion of the first contact. A glue layer is formed on the layered structure and the at least a portion of the first contact. The glue layer is removed from the at least a portion of the first contact. A second contact is formed contacting the first contact and the glue layer.

    摘要翻译： 提供一种形成半导体器件的方法。 该方法包括以下步骤。 提供具有第一触点的基板。 在基板上形成层状结构。 形成层状结构中的凹部以暴露第一接触件的至少一部分。 在层状结构和第一接触的至少一部分上形成胶层。 胶层从第一接触件的至少一部分去除。 形成接触第一接触和胶层的第二接触。

    Lens structures suitable for use in image sensors and method for making the same
    4.
    发明授权
    Lens structures suitable for use in image sensors and method for making the same 有权
    适用于图像传感器的镜头结构及其制作方法

    公开(公告)号：US07443005B2

    公开(公告)日：2008-10-28

    申请号：US10982978

    申请日：2004-11-05

    申请人： Ching-Sen Kuo ,  Feng-Jia Shiu ,  Gwo-Yuh Shiau ,  Jieh-Jang Chen ,  Shih-Chi Fu ,  Chien Hsien Tseng ,  Chia-Shiung Tsai ,  Yuan-Hung Liu ,  Yeur-Luen Tu ,  Chih-Ta Wu ,  Chi-Hsin Lo

    发明人： Ching-Sen Kuo ,  Feng-Jia Shiu ,  Gwo-Yuh Shiau ,  Jieh-Jang Chen ,  Shih-Chi Fu ,  Chien Hsien Tseng ,  Chia-Shiung Tsai ,  Yuan-Hung Liu ,  Yeur-Luen Tu ,  Chih-Ta Wu ,  Chi-Hsin Lo

    IPC分类号： H01L29/78

    CPC分类号： H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14685 ,  H01L27/14687

    摘要： An image sensor includes a double-microlens structure with an outer microlens aligned over an inner microlens, both microlenses aligned over a corresponding photosensor. The inner or outer microlens may be formed by a silylation process in which a reactive portion of a photoresist material reacts with a silicon-containing agent. The inner or outer microlens may be formed by step etching of a dielectric material, the step etching process including a series of alternating etch steps including an anisotropic etching step and an etching step that causes patterned photoresist to laterally recede. Subsequent isotropic etching processes may be used to smooth the etched step structure and form a smooth lens. A thermally stable and photosensitive polymeric/organic material may also be used to form permanent inner or outer lenses. The photosensitive material is coated then patterned using photolithography, reflowed, then cured to form a permanent lens structure.

    摘要翻译： 图像传感器包括双微透镜结构，其外部微透镜在内部微透镜上对准，两个微透镜在相应的光电传感器上对准。 内部或外部微透镜可以通过甲硅烷基化方法形成，其中光致抗蚀剂材料的反应性部分与含硅试剂反应。 内部或外部微透镜可以通过介电材料的步骤蚀刻形成，该步骤蚀刻工艺包括一系列交替蚀刻步骤，其包括各向异性蚀刻步骤和使图案化光致抗蚀剂横向后退的蚀刻步骤。 可以使用随后的各向同性蚀刻工艺来平滑蚀刻的台阶结构并形成光滑的透镜。 热稳定和感光的聚合物/有机材料也可用于形成永久的内镜片或外镜片。 感光材料被涂覆，然后使用光刻图案化，回流，然后固化以形成永久性透镜结构。

    Method of forming contact plugs for eliminating tungsten seam issue
    5.
    发明申请
    Method of forming contact plugs for eliminating tungsten seam issue 审中-公开
    形成用于消除钨焊缝问题的接触塞的方法

    公开(公告)号：US20080217775A1

    公开(公告)日：2008-09-11

    申请号：US11714770

    申请日：2007-03-07

    申请人： Chih-Yang Pai ,  Wen-Chuan Chiang ,  Chung-Yi Yu ,  Yeur-Luen Tu ,  Yuan-Hung Liu ,  Hsiang-Fan Lee ,  Chuan-Jong Wang

    发明人： Chih-Yang Pai ,  Wen-Chuan Chiang ,  Chung-Yi Yu ,  Yeur-Luen Tu ,  Yuan-Hung Liu ,  Hsiang-Fan Lee ,  Chuan-Jong Wang

    IPC分类号： H01L23/52 ,  H01L21/4763

    CPC分类号： H01L21/76877 ,  H01L21/76849 ,  H01L27/10855 ,  H01L27/10888

    摘要： A method of forming a contact plug of an eDRAM device includes the following steps: forming a tungsten layer with tungsten seam on a dielectric layer to fill a contact hole; removing the tungsten layer from the top surface of the dielectric layer, recessing the tungsten layer in the contact hole to form a recess of about 600˜900 Angstroms in depth below the top surface of the dielectric layer, depositing a conductive layer on the dielectric layer and the recessed tungsten plug to fill the recess; and removing the conductive layer from the top surface of the dielectric layer to form a conductive plug on the recessed tungsten plug in the contact hole.

    摘要翻译： 形成eDRAM器件的接触插塞的方法包括以下步骤：在电介质层上形成具有钨接缝的钨层以填充接触孔; 从电介质层的顶表面去除钨层，使接触孔中的钨层凹陷，以在电介质层的顶表面下方深度形成约600〜900埃的凹陷，在电介质层上沉积导电层 和凹入的钨塞填充凹槽; 并且从电介质层的顶表面去除导电层，以在接触孔中的凹入的钨插塞上形成导电插塞。

    Flash memory cell and methods for fabricating same
    6.
    发明授权
    Flash memory cell and methods for fabricating same 有权
    闪存单元及其制造方法

    公开(公告)号：US07214589B2

    公开(公告)日：2007-05-08

    申请号：US10803448

    申请日：2004-03-18

    申请人： Yuan-Hung Liu ,  Yeur-Luen Tu

    发明人： Yuan-Hung Liu ,  Yeur-Luen Tu

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324

    摘要： A split gate flash memory cell having floating gates with sharp, upwardly flared corners, protective caps of dielectric material which are substantially square or rectangular in cross-section, and elongated and thin Vss dielectric spacers disposed along substantially planar side walls defined by the floating gates and the protective caps.

    摘要翻译： 具有浮动栅极的分裂栅极闪存单元，其具有尖锐的向上扩展的角，具有基本上为矩形或矩形横截面的介电材料的保护盖，以及沿着由浮动栅极限定的基本平坦的侧壁设置的细长且薄的Vss电介质间隔件 和保护盖。

    Methods to improve photonic performances of photo-sensitive integrated circuits
    7.
    发明授权
    Methods to improve photonic performances of photo-sensitive integrated circuits 有权
    提高光敏集成电路光子性能的方法

    公开(公告)号：US07189957B2

    公开(公告)日：2007-03-13

    申请号：US10906604

    申请日：2005-02-25

    申请人： Shih-Chi Fu ,  Yuan-Hung Liu ,  Kuo-Yin Lin ,  Feng-Jia Shiu ,  Chia-Shiung Tsai ,  Ching-Sen Kuo ,  Jieh-Jang Chen

    发明人： Shih-Chi Fu ,  Yuan-Hung Liu ,  Kuo-Yin Lin ,  Feng-Jia Shiu ,  Chia-Shiung Tsai ,  Ching-Sen Kuo ,  Jieh-Jang Chen

    IPC分类号： H01L31/00 ,  H01L21/00

    CPC分类号： H01L27/14685 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/14654

    摘要： Described is a light-directing feature formed in the inter-level dielectric (ILD) layer in combination with an anti-reflective (AR) layer to effectively and simultaneously increase quantum efficiency and cross-talk immunity thereby improving photonic performances of photo-sensitive integrated circuits. A plurality of photosensor cells is formed on a semiconductor substrate. An AR layer is subsequently formed on the plurality of photosensor cells, the AR layer being substantially non-reflective of incident light. An ILD layer is then formed over the AR layer, the ILD layer comprising a plurality of light-directing features formed in openings in the ILD layer over the AR layer above and about certain of the plurality of photosensor cells.

    摘要翻译： 描述了在层间电介质（ILD）层中形成的与抗反射（AR）层组合的光导特征，以有效并同时地提高量子效率和串扰抗扰度，从而改善光敏集成的光子性能 电路。 多个光电传感器单元形成在半导体基板上。 随后在多个光电传感器单元上​​形成AR层，AR层基本上不反射入射光。 然后在AR层上形成ILD层，ILD层包括多个导光特征，其形成在ILD层中的多个光敏元件上方和周围的AR层上的开口中。

    MAGNETIC MEMORY CELLS AND MANUFACTURING METHODS
    8.
    发明申请
    MAGNETIC MEMORY CELLS AND MANUFACTURING METHODS 有权
    磁记忆细胞和制造方法

    公开(公告)号：US20060183318A1

    公开(公告)日：2006-08-17

    申请号：US10906357

    申请日：2005-02-15

    申请人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    IPC分类号： H01L21/4763 ,  H01L21/00

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

    摘要翻译： 改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。 通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。 然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。 然后可以在掩模层和导电通孔上形成导电存储器线。

    Method of fabricating a borderless via
    9.
    发明授权
    Method of fabricating a borderless via 有权
    制造无边界通孔的方法

    公开(公告)号：US06352919B1

    公开(公告)日：2002-03-05

    申请号：US09620033

    申请日：2000-07-20

    申请人： Yeur-Luen Tu ,  Bor-Wen Chan ,  Yuan-Hung Liu

    发明人： Yeur-Luen Tu ,  Bor-Wen Chan ,  Yuan-Hung Liu

    IPC分类号： H01L214763

    CPC分类号： H01L21/76802 ,  H01L21/76801

    摘要： A method of fabricating a borderless via is disclosed. A semiconductor substrate having a first dielectric layer thereon is provided. Next, a first conductive structure and a second conductive structure whose area is much smaller than said first conductive structure are formed on said first dielectric layer. After that, a second dielectric layer with an uneven surface is formed. Then, a planarizing layer is coated over said second dielectric layer to fill said uneven surface. Next, an etch back process is used to create a etching stop layer consisting of a portion of second dielectric layer. Subsequently, a third dielectric layer is formed over said second dielectric layer followed by selectively etching said third dielectric layer until said second dielectric layer is exposed to create a borderless via.

    摘要翻译： 公开了制造无边界通孔的方法。 提供其上具有第一介电层的半导体衬底。 接下来，在所述第一介电层上形成面积比所述第一导电结构小得多的第一导电结构和第二导电结构。 之后，形成具有不平坦表面的第二电介质层。 然后，在所述第二电介质层上涂覆平坦化层以填充所述不平坦表面。 接下来，使用回蚀工艺来产生由第二介电层的一部分组成的蚀刻停止层。 随后，在所述第二电介质层上形成第三电介质层，随后选择性地蚀刻所述第三电介质层，直到所述第二电介质层暴露以形成无边界通孔。