公开(公告)号：US08779410B2

公开(公告)日：2014-07-15

申请号：US13355692

申请日：2012-01-23

申请人： Motoyuki Sato ,  Yoshiaki Asao ,  Takashi Obara ,  Takashi Nakazawa

发明人： Motoyuki Sato ,  Yoshiaki Asao ,  Takashi Obara ,  Takashi Nakazawa

IPC分类号： H01L21/00 ,  H01L29/06 ,  H01L27/22

CPC分类号： H01L27/228

摘要： According to one embodiment, a resistance change memory includes resistance change elements, vias and sidewall insulating layers, the elements and the vias provided alternately in a first direction and a second direction orthogonal to the first direction, and the sidewall insulating layers provided on sidewalls of the elements. The elements are provided in a lattice pattern having a constant pitch. A thickness of each of the sidewall insulating layers in a direction orthogonal to the sidewalls is a value for contacting the sidewall insulating layers each other or more to form holes between the sidewall insulating layers. The vias are provided in the holes respectively.

摘要翻译： 根据一个实施例，电阻变化存储器包括电阻变化元件，通路和侧壁绝缘层，沿与第一方向正交的第一方向和第二方向上交替设置的元件和通孔，以及设置在第二方向上的侧壁绝缘层 元素。 元件以具有恒定间距的格子图案提供。 每个侧壁绝缘层在与侧壁正交的方向上的厚度是用于使侧壁绝缘层彼此接触或接触以在侧壁绝缘层之间形成孔的值。 通孔分别设置在孔中。

公开(公告)号：US20130001506A1

公开(公告)日：2013-01-03

申请号：US13355692

申请日：2012-01-23

申请人： Motoyuki SATO ,  Yoshiaki Asao ,  Takashi Obara ,  Takashi Nakazawa

发明人： Motoyuki SATO ,  Yoshiaki Asao ,  Takashi Obara ,  Takashi Nakazawa

IPC分类号： H01L27/26 ,  H01L47/00

CPC分类号： H01L27/228

摘要： According to one embodiment, a resistance change memory includes resistance change elements, vias and sidewall insulating layers, the elements and the vias provided alternately in a first direction and a second direction orthogonal to the first direction, and the sidewall insulating layers provided on sidewalls of the elements. The elements are provided in a lattice pattern having a constant pitch. A thickness of each of the sidewall insulating layers in a direction orthogonal to the sidewalls is a value for contacting the sidewall insulating layers each other or more to form holes between the sidewall insulating layers. The vias are provided in the holes respectively.

摘要翻译： 根据一个实施例，电阻变化存储器包括电阻变化元件，通路和侧壁绝缘层，沿与第一方向正交的第一方向和第二方向上交替设置的元件和通孔，以及设置在第二方向上的侧壁绝缘层 元素。 元件以具有恒定间距的格子图案提供。 每个侧壁绝缘层在与侧壁正交的方向上的厚度是用于使侧壁绝缘层彼此接触或接触以在侧壁绝缘层之间形成孔的值。 通孔分别设置在孔中。

公开(公告)号：US09190453B2

公开(公告)日：2015-11-17

申请号：US14622027

申请日：2015-02-13

申请人： Takashi Nakazawa ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Kenji Noma

发明人： Takashi Nakazawa ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Kenji Noma

IPC分类号： H01L43/00 ,  H01L27/00 ,  H01L27/22 ,  H01L43/12 ,  H01L27/24 ,  H01L43/08 ,  H01L43/02 ,  G11C11/16

CPC分类号： H01L27/228 ,  G11C11/161 ,  G11C11/1655 ,  H01L27/2463 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

摘要： According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.

公开(公告)号：US08981446B2

公开(公告)日：2015-03-17

申请号：US14018337

申请日：2013-09-04

申请人： Takashi Nakazawa ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Kenji Noma

发明人： Takashi Nakazawa ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Kenji Noma

IPC分类号： H01L27/108 ,  H01L21/8244 ,  G11C11/00 ,  H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16

CPC分类号： H01L27/228 ,  G11C11/161 ,  G11C11/1655 ,  H01L27/2463 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

摘要： According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.

摘要翻译： 根据一个实施例，公开了一种包括在沟槽中具有绝缘体的隔离区的磁存储器。 隔离区域限定在第一方向上延伸并且具有第一和第二有源区域的有源区域，在第一和第二有效区域之间存在沿垂直于第一方向的第二方向延伸的隔离区域。 在第二方向上延伸的第一和第二字线被埋在半导体衬底的表面中。 连接到字线的第一和第二选择晶体管在第一有效区域。 连接到第一和第二选择晶体管的漏极区的第一和第二可变电阻元件在第一有效区上。

公开(公告)号：US08941197B2

公开(公告)日：2015-01-27

申请号：US13370075

申请日：2012-02-09

申请人： Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： H01L27/22 ,  G11C11/16

CPC分类号： H01L43/08 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1675 ,  H01L27/222 ,  H01L27/228 ,  H01L43/02 ,  H01L43/10

摘要： A magnetic random access memory which is a memory cell array including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed layer and the recording layer, wherein all conductive layers in the memory cell array arranged below the magnetoresistive effect element are formed of materials each containing an element selected from a group including W, Mo, Ta, Ti, Zr, Nb, Cr, Hf, V, Co, and Ni.

摘要翻译： 一种磁性随机存取存储器，其是包括具有固定磁化方向的固定层的磁阻效应元件，其磁化方向可逆的记录层和设置在固定层与记录层之间的非磁性层的存储单元阵列 其中，布置在磁阻效应元件下方的存储单元阵列中的所有导电层由各自含有选自包括W，Mo，Ta，Ti，Zr，Nb，Cr，Hf，V，Co和 倪

公开(公告)号：US07920412B2

公开(公告)日：2011-04-05

申请号：US12605072

申请日：2009-10-23

申请人： Keiji Hosotani ,  Yoshiaki Asao ,  Akihiro Nitayama

发明人： Keiji Hosotani ,  Yoshiaki Asao ,  Akihiro Nitayama

IPC分类号： G11C11/00

CPC分类号： H01L27/228 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

摘要： A magnetic random access memory includes a first wiring, a second wiring formed above and spaced apart from the first wiring, a magnetoresistive effect element formed between the first wiring and the second wiring, formed in contact with an upper surface of the first wiring, and having a fixed layer, a recording layer, and a nonmagnetic layer formed between the fixed layer and the recording layer, a metal layer formed on the magnetoresistive effect element and integrated with the magnetoresistive effect element to form stacked layers, a first side insulating film formed on side surfaces of the metal layer, the magnetoresistive effect element, and the first wiring, a first contact formed in contact with a side surface of the first side insulating film, and a third wiring formed on the metal layer and the first contact to electrically connect the magnetoresistive effect element and the first contact.

摘要翻译： 磁性随机存取存储器包括第一布线，形成在第一布线上方并与第一布线间隔开的第二布线;形成在与第一布线的上表面接触形成的第一布线和第二布线之间的磁阻效应元件，以及 具有形成在固定层和记录层之间的固定层，记录层和非磁性层，形成在磁阻效应元件上并与磁阻效应元件集成以形成堆叠层的金属层，形成第一侧绝缘膜 在金属层的侧表面，磁阻效应元件和第一布线，与第一侧绝缘膜的侧表面接触形成的第一触点和形成在金属层上的第三布线和第一触点电连接 连接磁阻效应元件和第一触点。

公开(公告)号：US07916522B2

公开(公告)日：2011-03-29

申请号：US12400262

申请日：2009-03-09

申请人： Kiyotaro Itagaki ,  Tsuneo Inaba ,  Yoshihiro Ueda ,  Yoshiaki Asao

发明人： Kiyotaro Itagaki ,  Tsuneo Inaba ,  Yoshihiro Ueda ,  Yoshiaki Asao

IPC分类号： G11C11/15

CPC分类号： G11C11/5607 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/75 ,  G11C2213/78

摘要： A semiconductor memory device includes n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and change between the low-resistance state and the high-resistance state under different conditions, and a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1≦m≦n) times to the n resistance change elements during a write operation. Letting Im be a current value of an mth pulse current, condition I1>I2> . . . >Im holds.

摘要翻译： 半导体存储器件包括在一个单元中布置的具有低电阻状态和高电阻状态的n个电阻变化元件串联或并联连接，在相同电阻状态下具有不同的电阻值，并且在低电平 电阻状态和不同条件下的高电阻状态，以及与n个电阻变化元件的一端连接的写入电路，并向n个电阻变化元件施加脉冲电流m（1＆nlE; m＆nlE; n）次 在写操作期间。 令Im为第m个脉冲电流的当前值，条件I1> I2>。 。 。 > Im持有。

公开(公告)号：US07869259B2

公开(公告)日：2011-01-11

申请号：US12406898

申请日：2009-03-18

申请人： Yoshiaki Asao

发明人： Yoshiaki Asao

IPC分类号： G11C11/00

CPC分类号： G11C13/0069 ,  G11C13/0002 ,  G11C13/0097 ,  G11C16/0466 ,  G11C2013/0078 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/165

摘要： A resistance change memory includes a first interconnection, a second interconnection, a first resistance change element which has a first electrode, a second electrode, and a first tunnel insulating film provided between the first electrode and the second electrode, the first tunnel insulating film including a first trap region formed by introducing defects to trap holes or electrons, and the second electrode being connected to the first interconnection, and a first transistor whose current path has one end connected to the first electrode and the other end connected to the second interconnection.

摘要翻译： 电阻变化存储器包括第一互连，第二互连，第一电阻改变元件，其具有设置在第一电极和第二电极之间的第一电极，第二电极和第一隧道绝缘膜，第一隧道绝缘膜包括 通过引入缺陷以捕获空穴或电子而形成的第一陷阱区域，以及第二电极连接到第一互连件，以及第一晶体管，其电流通路的一端连接到第一电极，而另一端连接到第二互连。

公开(公告)号：US20080225577A1

公开(公告)日：2008-09-18

申请号：US12043617

申请日：2008-03-06

申请人： Keiji HOSOTANI ,  Yoshiaki Asao ,  Toshihiko Nagase

发明人： Keiji HOSOTANI ,  Yoshiaki Asao ,  Toshihiko Nagase

IPC分类号： G11C11/02 ,  H01L29/82 ,  H01L21/00 ,  G11C7/00

CPC分类号： G11C11/16 ,  B82Y10/00 ,  G11C11/1675 ,  H01L27/22 ,  H01L27/228 ,  H01L43/08

摘要： A magnetic random access memory includes a bit line running in a first direction, a first word line running in a second direction different from the first direction, and a memory element having a magnetoresistive effect element including a fixed layer having a fixed magnetization direction, a recording layer having a reversible magnetization direction, and a nonmagnetic layer formed between the fixed layer and the recording layer, the magnetization directions in the fixed layer and the recording layer being perpendicular to a film surface, and a heater layer in contact with the magnetoresistive effect element, the memory element being connected to the bit line, and formed to oppose a side surface of the first word line such that the memory element is insulated from the first word line.

摘要翻译： 磁性随机存取存储器包括沿第一方向运行的位线，沿与第一方向不同的第二方向运行的第一字线，以及具有包括具有固定磁化方向的固定层的磁阻效应元件的存储元件， 具有可逆磁化方向的记录层和形成在固定层和记录层之间的非磁性层，固定层和记录层中的磁化方向垂直于膜表面，以及与磁阻效应接触的加热器层 所述存储元件连接到所述位线，并形成为与所述第一字线的侧表面相对，使得所述存储元件与所述第一字线绝缘。

公开(公告)号：US20080151608A1

公开(公告)日：2008-06-26

申请号：US11959897

申请日：2007-12-19

申请人： Keiji HOSOTANI ,  Yoshiaki Asao

发明人： Keiji HOSOTANI ,  Yoshiaki Asao

IPC分类号： G11C11/00

CPC分类号： G11C11/16 ,  G11C11/1675 ,  G11C2213/75 ,  Y10S977/935

摘要： A semiconductor memory device includes first to fourth resistance change elements sequentially arranged apart from each other in a first direction, a first electrode which connects one terminals of the first and second resistance change elements, a second electrode which connects one terminals of the third and fourth resistance change elements, a bit line which connects the other terminals of the second and third resistance change elements, first to fourth word lines respectively paired with the first to fourth resistance change elements, arranged apart from the first and second electrodes, and running in a second direction, a first current source which supplies a first electric current to a chain structure, when writing data in a selected element, and a second current source which supplies a second electric current to a selected word line which corresponds to the selected element, when writing the data in the selected element.

摘要翻译： 一种半导体存储器件，包括：沿第一方向相互顺序排列的第一至第四电阻变化元件;连接第一和第二电阻变化元件的一个端子的第一电极;连接第三和第四电极的一个端子的第二电极; 电阻变化元件，连接第二和第三电阻变化元件的其他端子的位线，与第一和第四电阻变化元件分别配对的第一至第四字线与第一和第二电极分开配置，并且以 第二方向，当将数据写入所选择的元件时，将第一电流提供给链结构的第一电流源和向对应于所选择的元件的所选择的字线提供第二电流的第二电流源， 在所选元素中写入数据。