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公开(公告)号：US20150171042A1
公开(公告)日：2015-06-18
申请号：US14566309
申请日：2014-12-10
Applicant: NXP B.V.
Inventor： Hendrik Bouman , Roel Daamen , Coenraad Tak
CPC classification number: H01L24/17 , G01D11/245 , H01L21/565 , H01L23/3107 , H01L23/3121 , H01L24/32 , H01L24/81 , H01L24/83 , H01L2224/13144 , H01L2224/13155 , H01L2224/16113 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/48247 , H01L2224/48465 , H01L2224/81801 , H01L2224/8385 , H01L2224/83851 , H01L2924/0132 , H01L2924/12043 , H01L2924/14 , H01L2924/146 , H01L2924/181 , H01L2924/1815 , H01L2924/20643 , H01L2924/20644 , H01L2924/20645 , H01L2924/00012 , H01L2924/00
Abstract: A sensor package comprises a sensor chip bonded to an intermediate carrier, with the sensor element over an opening in the carrier. The package is for soldering to a board, during which the intermediate carrier protects the sensor part of the sensor chip.
Abstract translation: 传感器组件包括粘结到中间载体的传感器芯片，传感器元件位于载体的开口上。 该封装用于焊接到电路板，在此期间，中间载体保护传感器芯片的传感器部分。
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公开(公告)号：US20150279803A1
公开(公告)日：2015-10-01
申请号：US14229717
申请日：2014-03-28
Applicant: NXP B.V.
Inventor： Leonardus Antonius Elisabeth van Gemert , Coenraad Cornelis Tak , Marten Oldsen , Hendrik Bouman
IPC: H01L23/00
CPC classification number: H01L24/17 , B81B7/0048 , B81B7/007 , H01L24/11 , H01L24/14 , H01L24/73 , H01L2224/10135 , H01L2224/10165 , H01L2224/131 , H01L2224/1329 , H01L2224/13339 , H01L2224/1401 , H01L2224/14134 , H01L2224/16238 , H01L2224/1701 , H01L2224/26165 , H01L2224/26175 , H01L2224/29013 , H01L2224/29035 , H01L2224/32225 , H01L2224/73103 , H01L2224/73203 , H01L2224/73204 , H01L2224/81201 , H01L2224/81801 , H01L2224/81855 , H01L2224/83855 , H01L2224/92125 , H01L2924/35 , H01L2924/351 , H01L2924/00014 , H01L2924/00012 , H01L2924/014
Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.
Abstract translation: 一个示例性实施例公开了一种具有芯片面积的芯片，其中芯片区域包括：突出区域; 刚性联接区域，具有位于所述伸出区域的一侧上的一组刚性联接点; 以及柔性联接区域，其具有一组柔性联接点，位于与刚性联接区域相对的伸出区域的一侧。 另一示例性实施例公开了一种用于制造管芯互连的方法，包括：在具有芯片面积的芯片内制造具有一组刚性耦合点的刚性耦合器区域; 限定所述芯片区域内的伸出区域并与所述刚性耦合器区域邻接; 以及在与所述刚性耦合器区域相对的所述伸出区域的一侧的所述芯片区域内制造具有一组柔性耦合点的柔性耦合器区域。
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公开(公告)号：US09385099B2
公开(公告)日：2016-07-05
申请号：US14229717
申请日：2014-03-28
Applicant: NXP B.V.
Inventor： Leonardus Antonius Elisabeth van Gemert , Coenraad Cornelis Tak , Marten Oldsen , Hendrik Bouman
CPC classification number: H01L24/17 , B81B7/0048 , B81B7/007 , H01L24/11 , H01L24/14 , H01L24/73 , H01L2224/10135 , H01L2224/10165 , H01L2224/131 , H01L2224/1329 , H01L2224/13339 , H01L2224/1401 , H01L2224/14134 , H01L2224/16238 , H01L2224/1701 , H01L2224/26165 , H01L2224/26175 , H01L2224/29013 , H01L2224/29035 , H01L2224/32225 , H01L2224/73103 , H01L2224/73203 , H01L2224/73204 , H01L2224/81201 , H01L2224/81801 , H01L2224/81855 , H01L2224/83855 , H01L2224/92125 , H01L2924/35 , H01L2924/351 , H01L2924/00014 , H01L2924/00012 , H01L2924/014
Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.
Abstract translation: 一个示例性实施例公开了一种具有芯片面积的芯片，其中芯片区域包括：突出区域; 刚性联接区域，具有位于所述伸出区域的一侧上的一组刚性联接点; 以及柔性联接区域，其具有一组柔性联接点，位于与刚性联接区域相对的伸出区域的一侧。 另一示例性实施例公开了一种用于制造管芯互连的方法，包括：在具有芯片面积的芯片内制造具有一组刚性耦合点的刚性耦合器区域; 限定所述芯片区域内的伸出区域并与所述刚性耦合器区域邻接; 以及在与所述刚性耦合器区域相对的所述伸出区域的一侧的所述芯片区域内制造具有一组柔性耦合点的柔性耦合器区域。
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