公开(公告)号：US06974721B2

公开(公告)日：2005-12-13

申请号：US10496690

申请日：2003-08-28

申请人： Naoyuki Koizumi ,  Kei Murayama ,  Shigeru Mizuno ,  Takashi Kurihara

发明人： Naoyuki Koizumi ,  Kei Murayama ,  Shigeru Mizuno ,  Takashi Kurihara

IPC分类号： H01L21/301 ,  H01L21/00 ,  H01L21/02 ,  H01L21/68 ,  H01L21/78 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/6835 ,  H01L21/67092 ,  H01L21/67132 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/27 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2224/274 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/3512 ,  H01L2924/00

摘要： In manufacturing a thin semiconductor chip, a wafer is stably held during processing to maintain a stable shape and to avoid generation of cracks on the wafer. When a thin wafer having a surface thereon is to be processed, a rigid support body is adhered to the other surface of the thin wafer and a ring-shaped frame, encircling an outer periphery of the thin wafer, is adhered to the rigid support body.

摘要翻译： 在制造薄的半导体芯片时，晶片在加工过程中被稳定地保持以保持稳定的形状并且避免在晶片上产生裂纹。 当要处理其上具有表面的薄晶片时，刚性支撑体粘附到薄晶片的另一个表面，并且围绕薄晶片的外周的环形框架被粘附到刚性支撑体 。

公开(公告)号：US20050176169A1

公开(公告)日：2005-08-11

申请号：US10496690

申请日：2003-08-28

申请人： Naoyuki Koizumi ,  Kei Murayama ,  Shigeru Mizuno ,  Takashi Kurihara

发明人： Naoyuki Koizumi ,  Kei Murayama ,  Shigeru Mizuno ,  Takashi Kurihara

IPC分类号： H01L21/301 ,  H01L21/00 ,  H01L21/02 ,  H01L21/68 ,  H01L21/78 ,  H01L21/44

CPC分类号： H01L21/6835 ,  H01L21/67092 ,  H01L21/67132 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/27 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2224/274 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/3512 ,  H01L2924/00

摘要： To provide a method, for manufacturing a thin semiconductor chip, in which the wafer is stably held during processing to maintain a stable shape and to avoid generation of cracks on the wafer. When a thin wafer (1) having a surface (1a) thereon is to be processed, the method comprising the steps of: adhering a rigid support body (2) to the other surface (1b) of the thin wafer (1); and adhering a ring-shaped frame (3) encircling an outer periphery of the thin wafer to the rigid support body (2).

摘要翻译： 为了提供一种用于制造薄半导体芯片的方法，其中在处理期间晶片被稳定地保持以保持稳定的形状并且避免在晶片上产生裂纹。 当要处理其上具有表面（1a）的薄晶片（1）时，该方法包括以下步骤：将刚性支撑体（2）粘附到薄晶片（1）的另一表面（1b） ; 并且将围绕所述薄晶片的外周的环状框架（3）粘附到所述刚性支撑体（2）。

公开(公告)号：US07067353B2

公开(公告)日：2006-06-27

申请号：US10826034

申请日：2004-04-16

申请人： Naoyuki Koizumi ,  Kei Murayama ,  Takashi Kurihara ,  Mitsutoshi Higashi

发明人： Naoyuki Koizumi ,  Kei Murayama ,  Takashi Kurihara ,  Mitsutoshi Higashi

IPC分类号： H01L21/44

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/481 ,  H01L2221/68327 ,  H01L2221/68377 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor package, the method including the steps of attaching a bottom surface of a semiconductor wafer to a first supporting member, forming a through hole in the semiconductor wafer, separating the semiconductor wafer from the first supporting member, forming an insulating layer on at least the bottom surface of the semiconductor wafer and the inner wall of the through hole, forming a conducting layer underneath the semiconductor wafer, the conducting layer spanning at least the bottom of the through hole; and forming a conductive member in the through hole and in electrical contact with the conducting layer.

摘要翻译： 一种半导体封装的制造方法，其特征在于，包括以下步骤：将半导体晶片的底面安装在第一支撑构件上，在所述半导体晶片中形成通孔，将所述半导体晶片与所述第一支撑构件分离，形成绝缘体 至少在所述半导体晶片的底表面和所述通孔的内壁上形成在所述半导体晶片下方的导电层，所述导电层至少跨过所述通孔的底部; 以及在所述通孔中形成导电构件并与所述导电层电接触。

公开(公告)号：US08148738B2

公开(公告)日：2012-04-03

申请号：US11812149

申请日：2007-06-15

申请人： Kei Murayama ,  Mitsutoshi Higashi ,  Naoyuki Koizumi ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Masahiro Sunohara

发明人： Kei Murayama ,  Mitsutoshi Higashi ,  Naoyuki Koizumi ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Masahiro Sunohara

IPC分类号： H01L31/12

CPC分类号： H01L25/167 ,  H01L23/147 ,  H01L23/4926 ,  H01L23/62 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/32145 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a semiconductor device 100, a light emitting element 120 has been mounted on an upper plane of a semiconductor substrate 102. In an impurity diffusion region of the semiconductor substrate 102, a P conducting type of a layer 104, and an N layer 106 have been formed, while an N conducting type impurity is implanted to the P layer 104, and then the implanted impurity is diffused to constitute the N layer 106. A zener diode 108 made of a semiconductor device has been formed by the P layer 104 and the N layer 106.

摘要翻译： 在半导体器件100中，发光元件120已经被安装在半导体衬底102的上平面上。在半导体衬底102的杂质扩散区域中，P导电类型的层104和N层106具有 形成N导电型杂质，然后将N导电型杂质注入到P层104中，然后将注入的杂质扩散以构成N层106.由P层104形成由半导体器件制成的齐纳二极管108， N层106。

公开(公告)号：US08044429B2

公开(公告)日：2011-10-25

申请号：US12907594

申请日：2010-10-19

申请人： Mitsutoshi Higashi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Kei Murayama ,  Naoyuki Koizumi ,  Hideaki Sakaguchi

发明人： Mitsutoshi Higashi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Kei Murayama ,  Naoyuki Koizumi ,  Hideaki Sakaguchi

IPC分类号： H01L29/267 ,  H01L29/16

CPC分类号： H01L33/60 ,  H01L33/62 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  Y10T29/49002 ,  Y10T83/04 ,  H01L2224/05599

摘要： A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.

摘要翻译： 一种发光装置，其包括发光元件和布置有发光元件的基板。 壳体部分容纳发光元件并且具有从基板向上倾斜的形状以及围绕发光元件的金属框架并且包括被制成几乎镜面抛光表面的壳体部分的侧面设置在 底物。

公开(公告)号：US20110032710A1

公开(公告)日：2011-02-10

申请号：US12907594

申请日：2010-10-19

申请人： Mitsutoshi Higashi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Kei Murayama ,  Naoyuki Koizumi ,  Hideaki Sakaguchi

发明人： Mitsutoshi Higashi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Kei Murayama ,  Naoyuki Koizumi ,  Hideaki Sakaguchi

IPC分类号： F21V7/00 ,  F21V15/01 ,  H05K13/00 ,  B26D1/00

CPC分类号： H01L33/60 ,  H01L33/62 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  Y10T29/49002 ,  Y10T83/04 ,  H01L2224/05599

摘要： A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.

摘要翻译： 一种发光装置，其包括发光元件和布置有发光元件的基板。 壳体部分容纳发光元件并且具有从基板向上倾斜的形状以及围绕发光元件的金属框架并且包括被制成几乎镜面抛光表面的壳体部分的侧面设置在 底物。

公开(公告)号：US20080054486A1

公开(公告)日：2008-03-06

申请号：US11896009

申请日：2007-08-29

申请人： Kei Murayama ,  Akinori Shiraishi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Naoyuki Koizumi ,  Mitsutoshi Higashi

发明人： Kei Murayama ,  Akinori Shiraishi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Naoyuki Koizumi ,  Mitsutoshi Higashi

IPC分类号： H01L21/4763 ,  H01L23/48

CPC分类号： H01L23/055 ,  B81B7/007 ,  B81B2203/0353 ,  B81B2203/0384 ,  B81B2207/096 ,  B81C1/00103 ,  B81C2201/0132 ,  H01L21/486 ,  H01L23/13 ,  H01L23/147 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.

摘要翻译： 一种制造封装的方法，包括：蚀刻步骤，蚀刻硅衬底，以及形成穿透硅衬底的通孔; 以及在所述通孔中嵌入导电材料的步骤，以及形成通孔塞，其特征在于，所述蚀刻步骤包括以直线形状形成所述通孔的第一蚀刻步骤和形成所述通孔的第二蚀刻步骤 锥形的孔。

公开(公告)号：US20070176197A1

公开(公告)日：2007-08-02

申请号：US11699034

申请日：2007-01-29

申请人： Akinori Shiraishi ,  Naoyuki Koizumi ,  Kei Murayama ,  Hideaki Sakaguchi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Mitsutoshi Higashi

发明人： Akinori Shiraishi ,  Naoyuki Koizumi ,  Kei Murayama ,  Hideaki Sakaguchi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Mitsutoshi Higashi

IPC分类号： H01L21/00 ,  H01L33/00 ,  H01L29/22

CPC分类号： H01L25/0753 ,  F21K9/00 ,  H01L33/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device 10 has such a structure that a plurality of through electrodes 30 is formed on a substrate 20 and each of terminals of light emitting devices (LEDs) 40 is electrically connected to each of the through electrodes 30 via a bump 50 on a lower surface side. In the semiconductor device 10, moreover, a partition wall 80 for surrounding a mounting region of each of the light emitting devices 40 is formed on the substrate 20. The partition wall 80 is formed by laminating a metal film (Cu) using a thin film forming method such as a plating method. Furthermore, the partition wall 80 is formed to be opposed close to each of side surfaces of the light emitting devices 40 and is provided to surround each of the light emitting devices 40.

摘要翻译： 半导体器件10具有在基板20上形成多个贯通电极30的结构，并且发光器件（LED）40的每个端子经由下部的凸块50电连接到每个贯通电极30 表面 此外，在半导体装置10中，在基板20上形成有用于围绕各发光元件40的安装区域的分隔壁80.分隔壁80是利用薄膜 电镀法等成型方法。 此外，分隔壁80形成为与发光装置40的每个侧表面相对，并且被设置成围绕每个发光装置40。

公开(公告)号：US20070161211A1

公开(公告)日：2007-07-12

申请号：US11641336

申请日：2006-12-19

申请人： Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Naoyuki Koizumi ,  Kei Murayama ,  Hideaki Sakaguchi ,  Mitsutoshi Higashi

发明人： Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Naoyuki Koizumi ,  Kei Murayama ,  Hideaki Sakaguchi ,  Mitsutoshi Higashi

IPC分类号： H01L21/30

CPC分类号： H01L33/483 ,  B81B7/0067 ,  H01L2224/16225

摘要： A disclosed method for manufacturing a semiconductor device having a structure where a semiconductor element is mounted on a first substrate includes the steps of: bonding the first substrate on which the semiconductor element is mounted and a second substrate made of a material different from a material of the first substrate so as to encapsulate the semiconductor element; forming a first groove in the first substrate and a second groove in the second substrate; and cleaving a portion between the first groove and the second groove so as to individualize the semiconductor device.

摘要翻译： 公开的制造半导体器件的半导体器件的方法，其中半导体元件安装在第一衬底上，包括以下步骤：将其上安装有半导体元件的第一衬底和由不同于 第一衬底以封装半导体元件; 在所述第一基板中形成第一凹槽，在所述第二基板中形成第二凹槽; 并且在第一凹槽和第二凹槽之间切割一部分，以使半导体器件单独化。

公开(公告)号：US20050110507A1

公开(公告)日：2005-05-26

申请号：US10980162

申请日：2004-11-04

申请人： Naoyuki Koizumi ,  Akinori Shiraishi ,  Kei Murayama

发明人： Naoyuki Koizumi ,  Akinori Shiraishi ,  Kei Murayama

IPC分类号： G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  H01L21/66 ,  G01R31/02

CPC分类号： G01R1/07342 ,  G01R3/00

摘要： In an electrical characteristic measuring probe of the present invention constructed by assembling a plurality of probe parts, each comprising a base portion, a plurality of terminal portions extended outward from one end of the base portion, wiring patterns extended from a plurality of terminal portions onto the base portion respectively, and contact portions connected to the wiring patterns respectively, a plurality of thin plate-like probe parts are aligned such that respective thin-plate surfaces are placed in parallel with each other and the contact portions are directed in the same direction, and a plurality of probe parts and spacers are fixed by fixing means in a state that the spacer is arranged between a plurality of probe parts respectively.

摘要翻译： 在通过组装多个探针部件构成的本发明的电特性测量探针中，每个探针部分包括基部，从基部的一端向外延伸的多个端子部分，从多个端子部分延伸的布线图案到 基部分别和分别连接到布线图案的接触部分，多个薄板状探针部分对齐，使得相应的薄板表面彼此平行放置，并且接触部分沿相同方向 并且多个探针部件和间隔件分别通过固定装置固定在间隔件分别设置在多个探针部件之间的状态。