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12 条记录 (耗时 0.019 秒)

    Process for etching silicon-containing material on substrates
    1.
    发明授权
    Process for etching silicon-containing material on substrates 失效
    在基板上蚀刻含硅材料的工艺

    公开(公告)号：US06322714B1

    公开(公告)日：2001-11-27

    申请号：US09116621

    申请日：1998-07-16

    申请人： Padmapani Nallan ,  Jeffrey Chinn ,  Stephen Yuen

    发明人： Padmapani Nallan ,  Jeffrey Chinn ,  Stephen Yuen

    IPC分类号： H01L213065

    CPC分类号： H01L21/02071 ,  H01L21/32137 ,  Y10S438/905

    摘要： A method of etching a silicon-containing layer 170 on a substrate 45 comprises the steps of placing the substrate 45 on a support 75 in a process chamber 50. The substrate 45 is exposed to an energized process gas comprising a bromine-containing gas, a chlorine-containing gas, an inorganic fluorinated gas, and an oxygen gas. The volumetric flow ratio of the gas constituents is selected so that the energized process gas etches regions 180a,b having different concentrations of dopant in the polysilicon layer 170 at substantially the same etching rate. Optionally, the gas composition is also tailored to simultaneously clean off etch residue from the internal surfaces of a process chamber 50 during etching of the substrate 45.

    摘要翻译： 蚀刻衬底45上的含硅层170的方法包括以下步骤：将衬底45放置在处理室50中的支撑件75上。衬底45暴露于包含含溴气体， 含氯气体，无机氟化气体和氧气。 选择气体组分的体积流量比，使得通电处理气体以基本上相同的蚀刻速率蚀刻多晶硅层170中具有不同浓度掺杂剂的区域180a，b。 任选地，气体组合物还被定制成在蚀刻基板45期间同时从处理室50的内表面清除蚀刻残留物。

    Etching a substrate in a process zone
    2.
    发明授权
    Etching a substrate in a process zone 失效
    在工艺区中刻蚀基材

    公开(公告)号：US06905800B1

    公开(公告)日：2005-06-14

    申请号：US09718319

    申请日：2000-11-21

    申请人： Stephen Yuen ,  Mohit Jain ,  Thorsten B. Lill

    发明人： Stephen Yuen ,  Mohit Jain ,  Thorsten B. Lill

    IPC分类号： G03F7/42 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/302

    CPC分类号： H01J37/321 ,  G03F7/427 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/32137

    摘要： A substrate processing method comprises providing a substrate 105 comprising etch resistant material 210 in a process zone 155, such as an energized gas zone in a process chamber 110. The etch resistant material 210 may comprise a resist material 230 over mask material 240. The process may further comprise removing the etch resistant material 210, such as the resist material 230, in the process zone 155 before etching underlying layers.

    摘要翻译： 衬底处理方法包括在处理区域155中提供包括耐蚀刻材料210的衬底105，例如处理室110中的通电气体区域。 耐蚀刻材料210可以包括掩模材料240上的抗蚀剂材料230。 该工艺可以进一步包括在蚀刻下面的层之前去除处理区155中的耐蚀刻材料210，例如抗蚀剂材料230。

    Integrated shallow trench isolation approach
    4.
    发明授权
    Integrated shallow trench isolation approach 失效
    集成浅沟槽隔离方法

    公开(公告)号：US06677242B1

    公开(公告)日：2004-01-13

    申请号：US09637838

    申请日：2000-08-12

    申请人： Wei Liu ,  Scott Williams ,  Stephen Yuen ,  David Mui

    发明人： Wei Liu ,  Scott Williams ,  Stephen Yuen ,  David Mui

    IPC分类号： H01L21302

    CPC分类号： H01J37/32082 ,  G03F7/427 ,  H01J37/32935 ,  H01L21/0273 ,  H01L21/3065 ,  H01L21/3081

    摘要： A method for processing a silicon substrate disposed in a substrate process chamber includes transferring the substrate into the substrate process chamber. The substrate having a hard mask formed thereon and a patterned photoresist overlying the hard mask to expose portions of the hard mask. The chamber being the type having a source power system and a bias power system. The method further includes etching the exposed portions of the hard mask to expose portions of the silicon substrate underlying the hard mask. Thereafter, the patterned photoresist is exposed to a first plasma formed from a first process gas to remove the photoresist from the hard mask. Thereafter, the exposed silicon substrate is etched by exposing the substrate to a second plasma formed from a second process gas by applying RF energy from the source power system and biasing the plasma toward the substrate. The substrate is transferred out of the substrate processing chamber.

    摘要翻译： 设置在基板处理室中的处理硅基板的方法包括将基板转移到基板处理室中。 具有形成在其上的硬掩模的衬底和覆盖在硬掩模上的图案化光刻胶以暴露硬掩模的部分。 该室是具有源电力系统和偏置电力系统的类型。 该方法还包括蚀刻硬掩模的暴露部分以暴露位于硬掩模下方的硅衬底的部分。 此后，将图案化的光致抗蚀剂暴露于由第一工艺气体形成的第一等离子体以从硬掩模中除去光致抗蚀剂。 此后，通过从源电力系统施加RF能量并将等离子体偏压到衬底，将衬底暴露于由第二工艺气体形成的第二等离子体上来蚀刻暴露的硅衬底。 将衬底转移出衬底处理室。

    Integration of silicon etch and chamber cleaning processes
    6.
    发明授权
    Integration of silicon etch and chamber cleaning processes 失效
    硅蚀刻和室清洁工艺的集成

    公开(公告)号：US06566270B1

    公开(公告)日：2003-05-20

    申请号：US09662677

    申请日：2000-09-15

    申请人： Wei Liu ,  Scott Williams ,  Stephen Yuen ,  David Mui ,  Meihua Shen

    发明人： Wei Liu ,  Scott Williams ,  Stephen Yuen ,  David Mui ,  Meihua Shen

    IPC分类号： H01L21302

    CPC分类号： H01L21/3065

    摘要： A method for processing a substrate disposed in a substrate process chamber having a source power includes transferring the substrate into the substrate process chamber. A trench is etched on the substrate by exposing the substrate to a plasma formed from a first etchant gas by applying RF energy from the source power system and biasing the plasma toward the substrate. Byproducts adhering to inner surfaces of the substrate process chamber are removed by igniting a plasma formed from a second etchant gas including a halogen source in the substrate process chamber without applying bias power or applying minimal bias power. Thereafter, the substrate is removed from the chamber. At least 100 more substrates are processed with the etching-a-trench step and removing-etch-byproducts step before performing a dry clean or wet clean operation on the chamber.

    摘要翻译： 用于处理设置在具有源功率的基板处理室中的基板的方法包括将基板转移到基板处理室中。 通过从源功率系统施加RF能量并将等离子体偏压到衬底，将衬底暴露于由第一蚀刻剂气体形成的等离子体上，在衬底上蚀刻沟槽。 通过在不施加偏置功率或施加最小偏压功率的情况下点燃由包括卤素源的第二蚀刻剂气体在衬底处理室中形成的等离子体而去除附着于衬底处理室的内表面的副产物。 此后，将基板从腔室中取出。 在对腔室进行干洗或湿清洁操作之前，至少用100个蚀刻a沟槽步骤和去除蚀刻副产物步骤处理多个衬底。

    Gaming machine with multiple payoff modes and award presentation schemes
    7.
    发明授权
    Gaming machine with multiple payoff modes and award presentation schemes 有权
    具有多种收益模式和奖励演示方案的游戏机

    公开(公告)号：US06358147B1

    公开(公告)日：2002-03-19

    申请号：US09339286

    申请日：1999-06-23

    申请人： Joel R. Jaffe ,  Stephen Yuen

    发明人： Joel R. Jaffe ,  Stephen Yuen

    IPC分类号： A63F1300

    CPC分类号： G07F17/3244 ,  G07F17/34

    摘要： A slot machine with multiple payoff modes and award presentations. The payoff modes in one embodiment are associated with a basic game and include a first and second payoff mode, the second payoff mode defining a “SUPER SCATTER” feature. Game outcomes are selected in the first and second payoff mode and symbol groups associated with the game outcomes are evaluated in the first payoff mode for symbol combinations displayed relative to one or more paylines and in the second payoff mode for symbol combinations displayed in scatter-pay format. In one embodiment, the machine operates in the first payoff mode until the occurrence of a symbol combination triggering the second payoff mode, then operates in the second payoff mode for a single spin before returning to the first payoff mode. The award presentations include a non-linear sequence of award values which in one embodiment are associated with a bonus game characterized by characters bidding upon a selected object that may be presented in irregular time intervals. The sequence of award values (bids) including a first value (“opening bid”), a number of intermediate values (bids) and a final value (a “winning” bid). A payoff is awarded based on the final winning bid.

    摘要翻译： 具有多种收益模式和奖励演示的老虎机。 一个实施例中的支付模式与基本游戏相关联，并且包括第一和第二支付模式，第二支付模式定义了“超级散热器”特征。 在第一和第二收益模式中选择游戏结果，并且在第一支付模式中评估与游戏结果相关联的符号组，用于相对于一个或多个支付线显示的符号组合，以及用于以分散支付方式显示的符号组合的第二支付模式 格式。 在一个实施例中，机器以第一收益模式运行，直到出现符号组合触发第二收益模式，然后在返回到第一收益模式之前，在第一收益模式中进行单次转移。 奖励演示文稿包括奖励值的非线性序列，其在一个实施例中与以可以以不规则的时间间隔呈现的选定对象的角色出价的奖励游戏相关联。 包括第一价值（“开标”），中间价值（出价）数量和最终价值（“中标”出价）的奖励价值（投标）的顺序。 根据最终中标获得收益。

    Methods to eliminate “M-shape” etch rate profile in inductively coupled plasma reactor
    10.
    发明授权
    Methods to eliminate “M-shape” etch rate profile in inductively coupled plasma reactor 有权
    消除电感耦合等离子体反应器中的“M形”蚀刻速率曲线的方法

    公开(公告)号：US08956500B2

    公开(公告)日：2015-02-17

    申请号：US11739428

    申请日：2007-04-24

    申请人： Stephen Yuen ,  Kyeong-Tae Lee ,  Valentin Todorow ,  Tae Won Kim ,  Anisul Khan ,  Shashank Deshmukh

    发明人： Stephen Yuen ,  Kyeong-Tae Lee ,  Valentin Todorow ,  Tae Won Kim ,  Anisul Khan ,  Shashank Deshmukh

    IPC分类号： C23C16/00 ,  H01L21/306 ,  H01J37/32

    CPC分类号： H01J37/321

    摘要： An inductively-coupled plasma processing chamber has a chamber with a ceiling. A first and second antenna are placed adjacent to the ceiling. The first antenna is concentric to the second antenna. A plasma source power supply is coupled to the first and second antenna. The plasma source power supply generates a first RF power to the first antenna, and a second RF power to the second antenna. A substrate support disposed within the chamber. The size of the first antenna and a distance between the substrate support are such that the etch rate of the substrate on the substrate support is substantially uniform.

    摘要翻译： 电感耦合等离子体处理室具有带天花板的室。 第一和第二天线放置在天花板附近。 第一天线与第二天线同心。 等离子体源电源耦合到第一和第二天线。 等离子体源电源向第一天线产生第一RF功率，并向第二天线产生第二RF功率。 设置在室内的衬底支撑件。 第一天线的尺寸和衬底支撑件之间的距离使得衬底支撑件上的衬底的蚀刻速率基本上是均匀的。