Selective plasma etching process for aluminum oxide patterning
    1.
    发明申请
    Selective plasma etching process for aluminum oxide patterning 审中-公开
    氧化铝图案化的选择性等离子体蚀刻工艺

    公开(公告)号:US20050056615A1

    公开(公告)日:2005-03-17

    申请号:US10911294

    申请日:2004-08-04

    IPC分类号: C23F1/00 C23F4/00 H01L21/311

    CPC分类号: H01L21/31122

    摘要: This invention relates to a method for the selective and directed plasma etching of aluminum oxide, in which a mixture having the following constituents is used for etching: a. a polymerizing gas comprising at least partially unsaturated, perfluorinated hydrocarbon compounds; b. optionally a compound having the formula CHxFy, where x=1-3 and y=4-x; c. oxygen; and d. a suitable carrier gas; and this mixture as a plasma, is brought into contact with the aluminum oxide to be etched.

    摘要翻译: 本发明涉及一种用于氧化铝选择性和定向等离子体蚀刻的方法,其中具有以下成分的混合物用于蚀刻:a。 包含至少部分不饱和的全氟化烃化合物的聚合气体; b。 任选地具有式CH x F y的化合物,其中x = 1-3和y = 4-x; C。 氧; 和d。 合适的载气; 并将作为等离子体的混合物与待蚀刻的氧化铝接触。

    Method for manufacturing a capacitor electrode structure
    2.
    发明授权
    Method for manufacturing a capacitor electrode structure 失效
    电容器电极结构的制造方法

    公开(公告)号:US07544562B2

    公开(公告)日:2009-06-09

    申请号:US11489052

    申请日:2006-07-19

    摘要: A method for manufacturing a capacitor electrode structure, according to which the following steps are executed: A substrate is provided, which comprises contact pads arranged in lines and rows on a surface of the substrate. The lines are non-parallel to the rows. A first mold is applied on the substrate. At least one first trench is formed into the first mold above the contact pads. The first trench spans over at least two contact pads arranged in one row. A first dielectric layer is applied on side walls of the at least one first trench for forming first supporting walls. A second mold is applied on the substrate. At least one second trench is formed into the second mold above the contact pads. The second trench spans over at least two contact pads arranged in one line. A second dielectric layer is applied on side walls of the at least one second trench for forming second supporting walls. And a conductive layer is applied on the first and second supporting walls for forming a first electrode of the capacitor structure.

    摘要翻译: 一种用于制造电容器电极结构的方法,根据该方法执行以下步骤:提供基板,其包括在所述基板的表面上以行和行排列的接触焊盘。 线条与行不平行。 将第一模具施加在基板上。 在接触垫上方的第一模具中形成至少一个第一沟槽。 第一沟槽跨越排列成一行的至少两个接触垫。 第一电介质层被施加在用于形成第一支撑壁的至少一个第一沟槽的侧壁上。 在基板上施加第二模具。 在接触垫上方的第二模具中形成至少一个第二沟槽。 第二沟槽跨越排列成一行的至少两个接触垫。 第二介电层施加在至少一个第二沟槽的侧壁上,用于形成第二支撑壁。 并且在第一和第二支撑壁上施加导电层以形成电容器结构的第一电极。

    Stacked capacitor and method for producing stacked capacitors for dynamic memory cells
    3.
    发明申请
    Stacked capacitor and method for producing stacked capacitors for dynamic memory cells 失效
    叠层电容器和用于制造用于动态存储单元的叠层电容器的方法

    公开(公告)号:US20070059893A1

    公开(公告)日:2007-03-15

    申请号:US11518504

    申请日:2006-09-07

    IPC分类号: H01L21/336

    摘要: A method produces stacked capacitors for dynamic memory cells, in which a number of trenches (48) are formed in the masking layer (40), each trench (48) being arranged above a respective contact plug (26) and extending from the top (42) of the masking layer (40) to the contact plugs (26). A conductive layer (50) covers the side walls (49) of the trenches (48) and the contact plugs (26) in order to form a first electrode (60) of a stacked capacitor (12). In an upper region (63), which is remote from the contact stack (26), the conductive layer (50) is replaced by an insulating layer, so that it is not possible for a short circuit to arise in the event of any adhesion between adjacent electrodes.

    摘要翻译: 一种方法产生用于动态存储单元的堆叠电容器,其中在掩模层(40)中形成有多个沟槽(48),每个沟槽(48)布置在相应的接触插塞(26)的上方并从顶部 屏蔽层(40)的至少部分(42)连接到接触插塞(26)。 为了形成叠层电容器(12)的第一电极(60),导电层(50)覆盖沟槽(48)的侧壁(49)和接触插塞(26)。 在远离接触堆叠(26)的上部区域(63)中,导电层(50)由绝缘层代替,使得在任何粘附的情况下不可能出现短路 在相邻电极之间。

    Method of forming electrodes
    4.
    发明申请
    Method of forming electrodes 审中-公开
    电极形成方法

    公开(公告)号:US20070037349A1

    公开(公告)日:2007-02-15

    申请号:US11526788

    申请日:2006-09-25

    IPC分类号: H01L21/8242

    CPC分类号: H01L28/90 H01L27/1085

    摘要: To form a semiconductor device, a plurality of upwardly extending conductors can be formed. The conductors extend outward from a surface of a semiconductor body, adjacent ones of the conductors being separated from each other by a separating material. At least one support structure is formed between adjacent ones of the upwardly extending conductors. The support structure is formed of a material different than the separating material. The separating material can be removed and further processing can be performed on the semiconductor device.

    摘要翻译: 为了形成半导体器件,可以形成多个向上延伸的导体。 导体从半导体本体的表面向外延伸,相邻的导体通过分离材料相互分离。 在相邻的向上延伸的导体之间形成至少一个支撑结构。 支撑结构由与分离材料不同的材料形成。 可以去除分离材料并且可以在半导体器件上进行进一步的处理。

    Stacked capacitor and method for producing stacked capacitors for dynamic memory cells
    6.
    发明授权
    Stacked capacitor and method for producing stacked capacitors for dynamic memory cells 失效
    叠层电容器和用于制造用于动态存储单元的叠层电容器的方法

    公开(公告)号:US07413951B2

    公开(公告)日:2008-08-19

    申请号:US11518504

    申请日:2006-09-07

    IPC分类号: H01L21/8242

    摘要: A method produces stacked capacitors for dynamic memory cells, in which a number of trenches (48) are formed in the masking layer (40), each trench (48) being arranged above a respective contact plug (26) and extending from the top (42) of the masking layer (40) to the contact plugs (26). A conductive layer (50) covers the side walls (49) of the trenches (48) and the contact plugs (26) in order to form a first electrode (60) of a stacked capacitor (12). In an upper region (63), which is remote from the contact stack (26), the conductive layer (50) is replaced by an insulating layer, so that it is not possible for a short circuit to arise in the event of any adhesion between adjacent electrodes.

    摘要翻译: 一种方法产生用于动态存储单元的堆叠电容器,其中在掩模层(40)中形成有多个沟槽(48),每个沟槽(48)布置在相应的接触插塞(26)的上方并从顶部 屏蔽层(40)的至少部分(42)连接到接触插塞(26)。 为了形成叠层电容器(12)的第一电极(60),导电层(50)覆盖沟槽(48)的侧壁(49)和接触插塞(26)。 在远离接触堆叠(26)的上部区域(63)中,导电层(50)由绝缘层代替,使得在任何粘附的情况下不可能出现短路 在相邻电极之间。

    Method for manufacturing a capacitor electrode structure
    7.
    发明申请
    Method for manufacturing a capacitor electrode structure 失效
    电容器电极结构的制造方法

    公开(公告)号:US20080006863A1

    公开(公告)日:2008-01-10

    申请号:US11489052

    申请日:2006-07-19

    IPC分类号: H01L29/94

    摘要: A method for manufacturing a capacitor electrode structure, according to which the following steps are executed: A substrate is provided, which comprises contact pads arranged in lines and rows on a surface of the substrate. The lines are non-parallel to the rows. A first mold is applied on the substrate. At least one first trench is formed into the first mold above the contact pads. The first trench spans over at least two contact pads arranged in one row. A first dielectric layer is applied on side walls of the at least one first trench for forming first supporting walls. A second mold is applied on the substrate. At least one second trench is formed into the second mold above the contact pads. The second trench spans over at least two contact pads arranged in one line. A second dielectric layer is applied on side walls of the at least one second trench for forming second supporting walls. And a conductive layer is applied on the first and second supporting walls for forming a first electrode of the capacitor structure.

    摘要翻译: 一种用于制造电容器电极结构的方法,根据该方法执行以下步骤:提供基板,其包括在所述基板的表面上以行和行排列的接触焊盘。 线条与行不平行。 将第一模具施加在基板上。 在接触垫上方的第一模具中形成至少一个第一沟槽。 第一沟槽跨越排列成一行的至少两个接触垫。 第一电介质层被施加在用于形成第一支撑壁的至少一个第一沟槽的侧壁上。 在基板上施加第二个模具。 在接触垫上方的第二模具中形成至少一个第二沟槽。 第二沟槽跨越排列成一行的至少两个接触垫。 第二介电层施加在至少一个第二沟槽的侧壁上,用于形成第二支撑壁。 并且在第一和第二支撑壁上施加导电层以形成电容器结构的第一电极。

    Method for forming a capacitor structure and a capacitor structure
    8.
    发明申请
    Method for forming a capacitor structure and a capacitor structure 失效
    用于形成电容器结构和电容器结构的方法

    公开(公告)号:US20080003740A1

    公开(公告)日:2008-01-03

    申请号:US11477581

    申请日:2006-06-29

    IPC分类号: H01L21/8244

    摘要: A method for forming a capacitor structure, according to which the following consecutive steps are executed: providing a substrate having on its surface contact pads and a dielectric mold provided with at least one trench leaving exposed the contact pads; forming a first conductive layer on side walls of the trench in a top region of the trench the conductive layer being without contact to the contact pads;depositing a first dielectric layer; depositing a second conductive layer on the contact pad and on the side walls of the trench; depositing a second dielectric layer; depositing a third conductive layer; and forming a vertical plug interconnecting the first conductive layer and the third conductive layer.

    摘要翻译: 一种用于形成电容器结构的方法,根据该方法执行以下连续步骤:提供在其表面上具有接触焊盘的基板和设置有至少一个沟槽的介电模,留下暴露的接触焊盘; 在所述沟槽的顶部区域中在所述沟槽的侧壁上形成第一导电层,所述导电层不与所述接触焊盘接触; 沉积第一介电层; 在所述接触焊盘和所述沟槽的侧壁上沉积第二导电层; 沉积第二电介质层; 沉积第三导电层; 以及形成互连所述第一导电层和所述第三导电层的垂直插头。

    Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor
    9.
    发明申请
    Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor 失效
    用于半导体存储单元的存储电容器和制造存储电容器的方法

    公开(公告)号:US20070170487A1

    公开(公告)日:2007-07-26

    申请号:US11339744

    申请日:2006-01-25

    IPC分类号: H01L27/108 H01L21/20

    CPC分类号: H01L28/91 H01L27/10852

    摘要: A capacitor for a dynamic semiconductor memory cell, a memory and method of making a memory is disclosed. In one embodiment, a storage electrode of the capacitor has a pad-shaped lower section and a cup-shaped upper section, which is placed on top of the lower section. A lower section of a backside electrode encloses the pad-shaped section of the storage electrode. An upper section of the backside electrode is enclosed by the cup-shaped upper section of the storage electrode. A first capacitor dielectric separates the lower sections of the backside and the storage electrodes. A second capacitor dielectric separates the upper sections of the backside and the storage electrodes. The electrode area of the capacitor is enlarged while the requirements for the deposition of the capacitor dielectric are relaxed. Aspect ratios for deposition and etching processes are reduced.

    摘要翻译: 公开了用于动态半导体存储器单元的电容器,存储器和制造存储器的方法。 在一个实施例中,电容器的存储电极具有衬垫形下部和杯形上部,其放置在下部的顶部。 背面电极的下部包围存储电极的垫状部分。 背面电极的上部被储存电极的杯状上部包围。 第一电容器介质分离背面的下部和存储电极。 第二电容器电介质将背面的上部和存储电极分开。 电容器的电极面积被放大,而电容器电介质沉积的要求被放宽。 降低沉积和蚀刻工艺的长宽比。

    Method for producing a structure on the surface of a substrate
    10.
    发明授权
    Method for producing a structure on the surface of a substrate 有权
    在基板表面上制造结构的方法

    公开(公告)号:US08003538B2

    公开(公告)日:2011-08-23

    申请号:US12114948

    申请日:2008-05-05

    IPC分类号: H01L21/302

    摘要: The present invention relates to a method for producing a structure serving as an etching mask on the surface of a substrate. In this case, a first method involves forming a first partial structure on the surface of the substrate, which has structure elements that are arranged regularly and are spaced apart essentially identically. A second method involves forming spacers on the surface of the substrate, which adjoin sidewalls of the structure elements of the first partial structure, cutouts being provided between the spacers. A third method step involves introducing filling material into the cutouts between the spacers, a surface of the spacers being uncovered. A fourth method step involves removing the spacers in order to form a second partial structure having the filling material and having structure elements that are arranged regularly and are spaced apart essentially identically. The structure to be produced is composed of the first partial structure and the second partial structure.

    摘要翻译: 本发明涉及一种在基板表面上制造用作蚀刻掩模的结构的方法。 在这种情况下,第一种方法包括在衬底的表面上形成第一部分结构,其具有规则地排列并且基本相同地间隔开的结构元件。 第二种方法包括在衬底的表面上形成间隔物,其邻接第一部分结构的结构元件的侧壁,在间隔物之间​​提供切口。 第三种方法步骤包括将填充材料引入间隔件之间的切口中,间隔件的表面未被覆盖。 第四种方法步骤包括去除间隔物,以便形成具有填充材料的第二部分结构,并具有规则排列的结构元件并且基本相同地间隔开。 要制造的结构由第一部分结构和第二部分结构组成。