SURFACE TREATMENT OF TRANSPARENT CONDUCTIVE MATERIAL FILMS FOR IMPROVEMENT OF PHOTOVOLTAIC DEVICES
    1.
    发明申请
    SURFACE TREATMENT OF TRANSPARENT CONDUCTIVE MATERIAL FILMS FOR IMPROVEMENT OF PHOTOVOLTAIC DEVICES 审中-公开
    用于改善光伏器件的透明导电材料膜的表面处理

    公开(公告)号:US20110308584A1

    公开(公告)日:2011-12-22

    申请号:US12816681

    申请日:2010-06-16

    IPC分类号: H01L31/00 H01L31/18

    摘要: A tunneling layer is provided between a transparent conductive material and a p-doped semiconductor layer of a photovoltaic device. The tunneling layer is comprised of stoichiometric oxides which are formed when an upper surface of the transparent conductive material is subjected to one of the surface modification techniques of this disclosure. The surface modification techniques oxidize the dangling metal bonds of the transparent conductive material. The tunneling layer acts as a protective layer for the transparent conductive material. Moreover, the tunneling layer improves the interface between the transparent conductive material and the p-doped semiconductor layer. The improved interface that exists between the transparent conductive material and the p-doped semiconductor layer results in enhanced properties of the resultant photovoltaic device containing the same. In some embodiments, a high quality single junction solar cell can be provided by this disclosure that has a very well defined interface.

    摘要翻译: 在透明导电材料和光伏器件的p掺杂半导体层之间提供隧穿层。 隧道层由当透明导电材料的上表面经受本公开的表面改性技术之一时形成的化学计量的氧化物构成。 表面改性技术氧化透明导电材料的悬挂金属键。 隧道层用作透明导电材料的保护层。 此外,隧道层改善了透明导电材料和p掺杂半导体层之间的界面。 存在于透明导电材料和p掺杂半导体层之间的改进的界面导致所得到的含有该掺杂半导体层的光电器件的性能增强。 在一些实施例中,可以通过本公开提供具有非常良好定义的界面的高质量单结太阳能电池。

    DUAL TRANSPARENT CONDUCTIVE MATERIAL LAYER FOR IMPROVED PERFORMANCE OF PHOTOVOLTAIC DEVICES
    2.
    发明申请
    DUAL TRANSPARENT CONDUCTIVE MATERIAL LAYER FOR IMPROVED PERFORMANCE OF PHOTOVOLTAIC DEVICES 审中-公开
    双色透明导电材料层,用于改进光伏器件的性能

    公开(公告)号:US20110308585A1

    公开(公告)日:2011-12-22

    申请号:US12816745

    申请日:2010-06-16

    摘要: A dual transparent conductive material layer is provided between a p-doped semiconductor layer and a substrate layer of a photovoltaic device. The dual transparent conductive material layer includes a first transparent conductive material and a second transparent conductive material wherein the second transparent conductive material is nano-structured. The nano-structured second transparent conductive material acts as a protective layer for the underlying first transparent conductive material. The nano-structured transparent conductive material provides a benefit of a higher Eg of the underlying first transparent conductive material surface and a very high resilience to hydrogen plasma from the nano-structures during the formation of the p-doped semiconductor layer.

    摘要翻译: 在p掺杂半导体层和光伏器件的衬底层之间提供双透明导电材料层。 双透明导电材料层包括第一透明导电材料和第二透明导电材料,其中第二透明导电材料是纳米结构的。 纳米结构的第二透明导电材料用作下面的第一透明导电材料的保护层。 纳米结构的透明导电材料提供了下面的第一透明导电材料表面的更高等价的优点,以及在形成p掺杂半导体层期间来自纳米结构的氢等离子体的非常高的回弹性。

    PLASMA TREATMENT AT A P-I JUNCTION FOR INCREASING OPEN CIRCUIT VOLTAGE OF A PHOTOVOLTAIC DEVICE
    3.
    发明申请
    PLASMA TREATMENT AT A P-I JUNCTION FOR INCREASING OPEN CIRCUIT VOLTAGE OF A PHOTOVOLTAIC DEVICE 审中-公开
    用于增加光伏器件的开路电压的P-I结的等离子体处理

    公开(公告)号:US20110308583A1

    公开(公告)日:2011-12-22

    申请号:US12816528

    申请日:2010-06-16

    摘要: Open circuit voltage of a photovoltaic device including a p-i-n junction including amorphous silicon-containing semiconductor materials is increased by a high power plasma treatment on an amorphous p-doped silicon-containing semiconductor layer before depositing an amorphous intrinsic silicon-containing semiconductor layer. The high power plasma treatment deposits a thin layer of nanocrystalline silicon-containing semiconductor material or converts a surface layer of the amorphous p-doped silicon containing layer into a thin nanocrystalline silicon-containing semiconductor layer. After deposition of an intrinsic amorphous silicon layer, the thin nanocrystalline silicon-containing semiconductor layer functions as an interfacial nanocrystalline silicon-containing semiconductor layer located at a p-i junction. The increase in the open circuit voltage of the photovoltaic device through the plasma treatment depends on the composition of the interfacial crystalline silicon-containing semiconductor layer, and particularly on the atomic concentration of carbon in the interfacial crystalline silicon-containing semiconductor layer.

    摘要翻译: 在沉积非晶本征含硅半导体层之前,通过在非晶p掺杂的含硅半导体层上的高功率等离子体处理来增加包括包含非晶含硅半导体材料的p-i-n结的光电器件的开路电压。 高功率等离子体处理沉积薄层的纳米晶体含硅半导体材料或将非晶p掺杂含硅层的表面层转变为薄的纳米晶体含硅半导体层。 在本征非晶硅层沉积之后,薄纳米晶体含硅半导体层用作位于p-i结的界面纳米晶体含硅半导体层。 通过等离子体处理的光电器件的开路电压的增加取决于界面结晶含硅半导体层的组成,特别是取决于界面结晶含硅半导体层中的碳原子浓度。

    USE OF AN ORGANIC PLANARIZING MASK FOR CUTTING A PLURALITY OF GATE LINES
    5.
    发明申请
    USE OF AN ORGANIC PLANARIZING MASK FOR CUTTING A PLURALITY OF GATE LINES 失效
    使用有机平面化掩模切割大量的浇口线

    公开(公告)号:US20130143397A1

    公开(公告)日:2013-06-06

    申请号:US13612981

    申请日:2012-09-13

    IPC分类号: H01L21/28

    摘要: An organic planarizing layer (OPL) is formed atop a semiconductor substrate which includes a plurality of gate lines thereon. Each gate line includes at least a high k gate dielectric and a metal gate. A patterned photoresist having at least one pattern formed therein is then positioned atop the OPL. The at least one pattern in the photoresist is perpendicular to each of the gate lines. The pattern is then transferred by etching into the OPL and portions of each of the underlying gate lines to provide a plurality of gate stacks each including at least a high k gate dielectric portion and a metal gate portion. The patterned photoresist and the remaining OPL layer are then removed utilizing a sequence of steps including first contacting with a first acid, second contacting with an aqueous cerium-containing solution, and third contacting with a second acid.

    摘要翻译: 在其上包括多条栅极线的半导体衬底上形成有机平面化层(OPL)。 每个栅极线包括至少一个高k栅极电介质和金属栅极。 然后将其中形成有至少一种图案的图案化的光致抗蚀剂定位在OPL的顶部。 光致抗蚀剂中的至少一个图案垂直于每个栅极线。 然后通过蚀刻将图案转移到OPL和每个下面的栅极线的部分,以提供多个栅极堆叠,每个栅极堆叠包括至少一个高k栅极电介质部分和金属栅极部分。 然后使用一系列步骤除去图案化的光致抗蚀剂和剩余的OPL层,所述步骤包括首先与第一酸接触,第二次与含铈水溶液接触,并且与第二次酸接触。

    Method of patterning photosensitive material on a substrate containing a latent acid generator
    8.
    发明授权
    Method of patterning photosensitive material on a substrate containing a latent acid generator 失效
    在含有潜酸产生剂的基材上形成感光材料的方法

    公开(公告)号:US08475667B2

    公开(公告)日:2013-07-02

    申请号:US12820904

    申请日:2010-06-22

    IPC分类号: H01B13/00

    摘要: The present disclosure relates to a method of patterning a photosensitive material on a polymeric fill matrix comprising at least one latent photoacid generator; and a structure prepared according to said method. The method comprises: a. depositing a polymeric fill matrix comprising at least one latent photoacid generator; b. curing the polymeric fill matrix; c. depositing a layer of photosensitive material directly onto the cured polymeric fill matrix; and d. forming a pattern with at least one opening in the layer of photosensitive material with lithography.

    摘要翻译: 本公开涉及一种在包含至少一种潜在光酸产生剂的聚合物填充基质上图案化感光材料的方法; 以及根据所述方法制备的结构。 该方法包括:a。 沉积包含至少一种潜在光酸产生剂的聚合物填充基质; b。 固化聚合物填充基质; C。 将一层感光材料直接沉积到固化的聚合物填充基质上; 和d。 通过光刻在光敏材料层中形成具有至少一个开口的图案。

    Use of an organic planarizing mask for cutting a plurality of gate lines
    9.
    发明授权
    Use of an organic planarizing mask for cutting a plurality of gate lines 失效
    使用有机平面化掩模来切割多条栅极线

    公开(公告)号:US08455366B1

    公开(公告)日:2013-06-04

    申请号:US13612981

    申请日:2012-09-13

    IPC分类号: H01L21/302 H01L21/461

    摘要: An organic planarizing layer (OPL) is formed atop a semiconductor substrate which includes a plurality of gate lines thereon. Each gate line includes at least a high k gate dielectric and a metal gate. A patterned photoresist having at least one pattern formed therein is then positioned atop the OPL. The at least one pattern in the photoresist is perpendicular to each of the gate lines. The pattern is then transferred by etching into the OPL and portions of each of the underlying gate lines to provide a plurality of gate stacks each including at least a high k gate dielectric portion and a metal gate portion. The patterned photoresist and the remaining OPL layer are then removed utilizing a sequence of steps including first contacting with a first acid, second contacting with an aqueous cerium-containing solution, and third contacting with a second acid.

    摘要翻译: 在其上包括多条栅极线的半导体衬底上形成有机平面化层(OPL)。 每个栅极线包括至少一个高k栅极电介质和金属栅极。 然后将其中形成有至少一种图案的图案化的光致抗蚀剂定位在OPL的顶部。 光致抗蚀剂中的至少一个图案垂直于每个栅极线。 然后通过蚀刻将图案转移到OPL和每个下面的栅极线的部分,以提供多个栅极堆叠,每个栅极堆叠包括至少一个高k栅极电介质部分和金属栅极部分。 然后使用一系列步骤除去图案化的光致抗蚀剂和剩余的OPL层,所述步骤包括首先与第一酸接触,第二次与含铈水溶液接触,并且与第二次酸接触。