公开(公告)号：US20150294945A1

公开(公告)日：2015-10-15

申请号：US14251236

申请日：2014-04-11

Applicant: QUALCOMM Incorporated

Inventor： Siamak FAZELPOUR ,  Charles David PAYNTER ,  Ryan David LANE

IPC: H01L23/58 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L21/4885 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6638 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/1579 ,  H01R13/6471

Abstract: The disclosure is related to pin layouts in a semiconductor package. One embodiment of the disclosure provides a rhombus shaped shared reference pin layout that isolates a set of differential pin pairs. The differential signal pin pairs are configured such that an axis formed by a vertical signal pin pair is orthogonal to and mutually bisecting an axis formed by a lateral signal pin pair.

Abstract translation: 本公开涉及半导体封装中的引脚布局。 本公开的一个实施例提供了一种隔离一组差分引脚对的菱形共享参考引脚布局。 差分信号引脚对被配置为使得由垂直信号引脚对形成的轴线与横向信号引脚对形成的轴线正交并相互平分。

公开(公告)号：US20150228707A1

公开(公告)日：2015-08-13

申请号：US14179202

申请日：2014-02-12

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu SONG ,  Yunseo PARK ,  Xiaonan ZHANG ,  Ryan David LANE ,  Aristotele HADJICHRISTOS

IPC: H01L49/02 ,  H01L23/00

CPC classification number: H01L28/10 ,  H01L23/3192 ,  H01L23/5227 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/13006 ,  H01L2224/16225 ,  H01L2924/01029 ,  H01L2924/30107

Abstract: An inductor design on a wafer level package (WLP) does not need to depopulate the solder balls on the die because the solder balls form part of the inductor. One terminal on the inductor couples to the die, the other terminal couples to a single solder ball on the die, and the remaining solder balls that mechanically contact the inductor remain electrically floating. The resulting device has better inductance, direct current (DC) resistance, board-level reliability (BLR), and quality factor (Q).

Abstract translation: 晶圆级封装（WLP）上的电感器设计不需要将焊球沉淀在芯片上，因为焊球形成电感器的一部分。 电感器上的一个端子耦合到管芯，另一个端子耦合到管芯上的单个焊球，并且与电感器机械接触的剩余焊球保持电浮动。 所产生的器件具有更好的电感，直流（DC）电阻，电路板级可靠性（BLR）和品质因数（Q）。

公开(公告)号：US20160049349A1

公开(公告)日：2016-02-18

申请号：US14459319

申请日：2014-08-14

Applicant: QUALCOMM Incorporated

Inventor： Ryan David LANE ,  Charles David PAYNTER

IPC: H01L23/34 ,  H01L23/00 ,  H01L25/18

CPC classification number: H01L23/367 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/4334 ,  H01L24/19 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package on package semiconductor structure includes a first package positioned above a first surface of a substrate, a second package positioned above the first package, and a first thermal element positioned between the first package and the second package, wherein the first thermal element is separated from the second package by an air gap and the thermal element provides a heat path for heat generated by the first package.

Abstract translation: 封装半导体结构上的封装包括位于衬底的第一表面上方的第一封装，位于第一封装之上的第二封装以及位于第一封装与第二封装之间的第一热元件，其中第一热元件分离 从第二包装通过气隙，并且热元件为由第一包装产生的热量提供热路径。

公开(公告)号：US20150372425A1

公开(公告)日：2015-12-24

申请号：US14313133

申请日：2014-06-24

Applicant: QUALCOMM Incorporated

Inventor： Siamak FAZELPOUR ,  Charles David PAYNTER ,  Ryan David LANE

IPC: H01R13/6461

CPC classification number: H01R13/6461 ,  H01R12/714 ,  H01R43/205

Abstract: Methods and apparatuses for reducing crosstalk. The method couples a first pin, having a first magnetic field direction, with a first socket. The method couples a second pin, having a second magnetic field direction, in a second socket. The method orients the first pin approximately orthogonally to the second pin such that the first magnetic field direction and the second magnetic field direction are approximately orthogonally oriented.

Abstract translation: 减少串扰的方法和装置。 该方法将具有第一磁场方向的第一引脚与第一插座耦合。 该方法将具有第二磁场方向的第二销耦合到第二插座中。 所述方法将所述第一引脚大致正交于所述第二引脚，使得所述第一磁场方向和所述第二磁场方向近似正交定向。