公开(公告)号：US20170047413A1

公开(公告)日：2017-02-16

申请号：US15338539

申请日：2016-10-31

Applicant: Renesas Electronics Corporation

Inventor： Katsuhiro UCHIMURA ,  Michimoto KAMINAGA

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L21/265

CPC classification number: H01L29/4236 ,  H01L21/26513 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66348 ,  H01L29/66666 ,  H01L29/7397 ,  H01L29/7827

Abstract: A semiconductor device with enhanced reliability in which a gate electrode for a trench-gate field effect transistor is formed through a gate insulating film in a trench made in a semiconductor substrate. The upper surface of the gate electrode is in a lower position than the upper surface of the semiconductor substrate in an area adjacent to the trench. A sidewall insulating film is formed over the gate electrode and over the sidewall of the trench. The gate electrode and the sidewall insulating film are covered by an insulating film as an interlayer insulating film.

Abstract translation: 具有增强的可靠性的半导体器件，其中沟槽栅极场效应晶体管的栅电极通过在半导体衬底中制成的沟槽中的栅极绝缘膜形成。 栅电极的上表面位于与沟槽相邻的区域中比半导体衬底的上表面低的位置。 侧壁绝缘膜形成在栅电极上方和沟槽的侧壁上方。 栅电极和侧壁绝缘膜被作为层间绝缘膜的绝缘膜覆盖。

公开(公告)号：US20180068856A1

公开(公告)日：2018-03-08

申请号：US15643341

申请日：2017-07-06

Applicant: Renesas Electronics Corporation

Inventor： Kazuya HORIE ,  Katsuhiro UCHIMURA ,  Kazuhiro TOI ,  Masakazu NAKANO

IPC: H01L21/28 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/283 ,  H01L21/311 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L21/324 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/3065 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/32135 ,  H01L21/32155 ,  H01L29/66 ,  H01L29/66659 ,  H01L29/66727 ,  H01L29/66734

Abstract: In manufacturing a trench type MOSFET, reliability of a semiconductor device is prevented from being degraded due to a short circuit or lowering of withstand voltage between a trench gate electrode and a source region.To achieve the above, poly-silicon films are formed inside a trench in a main surface of a semiconductor substrate and over the semiconductor substrate. Further, phosphorus is thermally diffused into each poly-silicon film from a phosphorous film over an upper surface of the poly-silicon film. Still further, a silicon oxide film formed in a surface layer of the poly-silicon film by the thermal diffusion process is removed by a first dry etching process using a fluorocarbon gas or a hydroxy-fluorocarbon gas. Then, by performing a second dry etching process using a Cl2 gas etc., an insulating film is exposed and, thereby, a trench gate electrode including the poly-silicon film is formed.

公开(公告)号：US20230387219A1

公开(公告)日：2023-11-30

申请号：US18185079

申请日：2023-03-16

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Futoshi KOMATSU ,  Tomoo NAKAYAMA ,  Katsuhiro UCHIMURA ,  Hiroshi INAGAWA

IPC: H01L29/40 ,  H01L29/66 ,  H01L21/02 ,  H01L21/304 ,  H01L21/56 ,  H01L21/288

CPC classification number: H01L29/401 ,  H01L29/66348 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02359 ,  H01L21/304 ,  H01L21/56 ,  H01L21/288 ,  H01L29/4236

Abstract: A method of manufacturing a semiconductor device includes: forming a silicon oxide film covering each of a first main surface and a second main surface of a semiconductor substrate; forming a redistribution wiring on the first main surface side of the semiconductor substrate; and grinding the second main surface of the semiconductor substrate. This grinding step is performed in a state in which a thickness of the silicon oxide film positioned on the second main surface is equal to or larger than 10 nm and equal to or smaller than 30 nm.

公开(公告)号：US20180233568A1

公开(公告)日：2018-08-16

申请号：US15949281

申请日：2018-04-10

Applicant: Renesas Electronics Corporation

Inventor： Katsuhiro UCHIMURA ,  Michimoto KAMINAGA

IPC: H01L29/423 ,  H01L29/78 ,  H01L21/265

Abstract: A semiconductor device with enhanced reliability in which a gate electrode for a trench-gate field effect transistor is formed through a gate insulating film in a trench made in a semiconductor substrate. The upper surface of the gate electrode is in a lower position than the upper surface of the semiconductor substrate in an area adjacent to the trench. A sidewall insulating film is formed over the gate electrode and over the sidewall of the trench. The gate electrode and the sidewall insulating film are covered by an insulating film as an interlayer insulating film.