公开(公告)号：US20140252567A1

公开(公告)日：2014-09-11

申请号：US14261029

申请日：2014-04-24

Applicant: RF Micro Devices, Inc.

Inventor： Michael Carroll ,  Julio Costa ,  Daniel Charles Kerr ,  Don Willis ,  Elizabeth Glass

IPC: H01L29/02 ,  H01L21/02

CPC classification number: H01L21/0237 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3737 ,  H01L23/485 ,  H01L29/0657 ,  H01L29/78606 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/13

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.

Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括附接到晶片把手的半导体堆叠结构，其具有至少一个孔，其延伸穿过晶片把手到达半导体堆叠结构的暴露部分。 导热和电阻聚合物基本上填充至少一个孔并接触半导体堆叠结构的暴露部分。 用于制造半导体器件的一种方法包括在晶片手柄中形成图案化孔以暴露半导体堆叠结构的一部分。 图案化的孔可以或可以不与构成半导体堆叠结构的RF电路的部分对准。 接下来的步骤包括使半导体堆叠结构的暴露部分与聚合物接触，并且用聚合物基本上填充图案化的孔，其中聚合物是导热的并具有电阻性。

公开(公告)号：US09214337B2

公开(公告)日：2015-12-15

申请号：US14261029

申请日：2014-04-24

Applicant: RF Micro Devices, Inc.

Inventor： Michael Carroll ,  Julio Costa ,  Daniel Charles Kerr ,  Don Willis ,  Elizabeth Glass

IPC: H01L29/02 ,  H01L21/02 ,  H01L23/29 ,  H01L23/36 ,  H01L23/373 ,  H01L21/683 ,  H01L29/786 ,  H01L29/06 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L21/0237 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3737 ,  H01L23/485 ,  H01L29/0657 ,  H01L29/78606 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/13

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.

Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括附接到晶片把手的半导体堆叠结构，其具有至少一个孔，其延伸穿过晶片把手到达半导体堆叠结构的暴露部分。 导热和电阻聚合物基本上填充至少一个孔并接触半导体堆叠结构的暴露部分。 用于制造半导体器件的一种方法包括在晶片手柄中形成图案化孔以暴露半导体堆叠结构的一部分。 图案化的孔可以或可以不与构成半导体堆叠结构的RF电路的部分对准。 接下来的步骤包括使半导体堆叠结构的暴露部分与聚合物接触，并且用聚合物基本上填充图案化的孔，其中聚合物是导热的并具有电阻性。

公开(公告)号：US09184049B2

公开(公告)日：2015-11-10

申请号：US14261029

申请日：2014-04-24

Applicant: RF Micro Devices, Inc.

Inventor： Michael Carroll ,  Julio Costa ,  Daniel Charles Kerr ,  Don Willis ,  Elizabeth Glass

IPC: H01L29/02 ,  H01L21/02 ,  H01L23/29 ,  H01L23/36 ,  H01L23/373 ,  H01L21/683 ,  H01L29/786 ,  H01L29/06 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.

公开(公告)号：US20130140678A1

公开(公告)日：2013-06-06

申请号：US13749803

申请日：2013-01-25

Applicant: RF Micro Devices, Inc.

Inventor： Sangchae Kim ,  Tony Ivanov ,  Julio Costa

IPC: B81B7/02 ,  B81C1/00

CPC classification number: B81B7/02 ,  B81C1/0015 ,  H01L27/101 ,  H03H3/0072 ,  H03H9/02433 ,  H03H9/2405

Abstract: The present invention relates to using an insulator layer between two metal layers of a semiconductor die to provide a micro-electromechanical systems (MEMS) device, such as an ohmic MEMS switch or a capacitive MEMS switch. In an ohmic MEMS switch, the insulator layer may be used to reduce metal undercutting during fabrication, to prevent electrical shorting of a MEMS actuator to a MEMS cantilever, or both. In a capacitive MEMS switch, the insulator layer may be used as a capacitive dielectric between capacitive plates, which are provided by the two metal layers. A fixed capacitive element may be provided by the insulator layer between the two metal layers. In one embodiment of the present invention, an ohmic MEMS switch, a capacitive MEMS switch, a fixed capacitive element, or any combination thereof may be integrated into a single semiconductor die.

Abstract translation: 本发明涉及在半导体管芯的两个金属层之间使用绝缘体层来提供诸如欧姆MEMS开关或电容式MEMS开关的微机电系统（MEMS）器件。 在欧姆MEMS开关中，绝缘体层可用于在制造过程中减少金属底切，以防止MEMS致动器对MEMS悬臂的电短路，或两者兼而有之。 在电容MEMS开关中，绝缘体层可以用作由两个金属层提供的电容板之间的电容电介质。 固定的电容元件可以由两个金属层之间的绝缘体层提供。 在本发明的一个实施例中，欧姆MEMS开关，电容MEMS开关，固定电容元件或其任何组合可以集成到单个半导体管芯中。

公开(公告)号：US10759660B2

公开(公告)日：2020-09-01

申请号：US14711352

申请日：2015-05-13

Applicant: RF Micro Devices, Inc.

Inventor： Jonathan Hammond ,  Jan Edward Vandemeer ,  Julio Costa

IPC: B81C1/00

Abstract: A method for processing product wafers using carrier substrates is disclosed. The method includes a step of bonding a first carrier wafer to a first product wafer using a first temporary adhesion layer between a first carrier wafer surface and a first product wafer first surface. Another step includes bonding a second carrier wafer to a second product wafer using a second temporary adhesion layer between a second carrier wafer surface and a second product wafer surface. Another step includes bonding the first product wafer to the second product wafer using a permanent bond between a first product wafer second surface and a second product wafer first surface. In exemplary embodiments, at least one processing step is performed on the first product wafer after the first temporary carrier wafer is bonded to the first product wafer before the second product wafer is permanently bonded to the first product wafer.

公开(公告)号：US20150329355A1

公开(公告)日：2015-11-19

申请号：US14711352

申请日：2015-05-13

Applicant: RF Micro Devices, Inc.

Inventor： Jonathan Hammond ,  Jan Edward Vandemeer ,  Julio Costa

IPC: B81C1/00

CPC classification number: B81C1/00269 ,  B81C1/0015 ,  B81C2201/0194 ,  B81C2203/0118 ,  B81C2203/0127

Abstract: A method for processing product wafers using carrier substrates is disclosed. The method includes a step of bonding a first carrier wafer to a first product wafer using a first temporary adhesion layer between a first carrier wafer surface and a first product wafer first surface. Another step includes bonding a second carrier wafer to a second product wafer using a second temporary adhesion layer between a second carrier wafer surface and a second product wafer surface. Another step includes bonding the first product wafer to the second product wafer using a permanent bond between a first product wafer second surface and a second product wafer first surface. In exemplary embodiments, at least one processing step is performed on the first product wafer after the first temporary carrier wafer is bonded to the first product wafer before the second product wafer is permanently bonded to the first product wafer.

Abstract translation: 公开了一种使用载体衬底处理产品晶片的方法。 该方法包括使用第一载体晶片表面和第一产品晶片第一表面之间的第一临时粘合层将第一载体晶片接合到第一产品晶片的步骤。 另一步骤包括使用第二载体晶片表面和第二产品晶片表面之间的第二临时粘合层将第二载体晶片接合到第二产品晶片。 另一步骤包括使用第一产品晶片第二表面和第二产品晶片第一表面之间的永久接合将第一产品晶片连接到第二产品晶片。 在示例性实施例中，在第二产品晶片永久地结合到第一产品晶片之前，在第一临时载体晶片被结合到第一产品晶片之后，在第一产品晶片上执行至​​少一个处理步骤。

公开(公告)号：US09019010B2

公开(公告)日：2015-04-28

申请号：US13900077

申请日：2013-05-22

Applicant: RF Micro Devices, Inc.

Inventor： Julio Costa

IPC: H03F3/68 ,  H03F3/191 ,  H03F3/193 ,  H03F3/21 ,  H03F3/24 ,  H04B1/00

CPC classification number: H03F3/193 ,  H03F3/191 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/111 ,  H03F2200/318 ,  H03F2200/408 ,  H03F2203/21157 ,  H04B1/0057

Abstract: Combination circuitry includes a relatively small preamplifier and includes hybrid circuitry. The hybrid circuitry is configured to perform mode switching while also performing some amplification, thus allowing the relatively small preamplifier to be smaller than a conventional power amplifier. In one embodiment, the hybrid circuitry includes first series portion configured to amplify when ON, a first shunt portion, a second series portion configured to amplify when ON, and a second shunt portion. The first series portion may include: a first transistor; a first variable impedance in communication with a gate of the first transistor, wherein the first variable impedance is configured to receive a first transistor control signal; a second transistor in series with the first transistor; and a second variable impedance in communication with a gate of the second transistor, wherein second variable impedance is configured to receive a second transistor control signal.

Abstract translation: 组合电路包括相对小的前置放大器并且包括混合电路。 混合电路被配置为执行模式切换，同时还执行一些放大，从而允许相对小的前置放大器小于常规功率放大器。 在一个实施例中，混合电路包括第一串联部分，其被配置为当ON时放大，第一分流部分，被配置为在ON时被放大的第二串联部分和第二分流部分。 第一串联部分可以包括：第一晶体管; 与所述第一晶体管的栅极通信的第一可变阻抗，其中所述第一可变阻抗被配置为接收第一晶体管控制信号; 与第一晶体管串联的第二晶体管; 以及与第二晶体管的栅极通信的第二可变阻抗，其中第二可变阻抗被配置为接收第二晶体管控制信号。

公开(公告)号：US20140242760A1

公开(公告)日：2014-08-28

申请号：US14276370

申请日：2014-05-13

Applicant: RF Micro Devices, Inc.

Inventor： Michael Carroll ,  Daniel Charles Kerr ,  Christian Rye Iversen ,  Philip W. Mason ,  Julio Costa ,  Edward T. Spears

IPC: H01L21/84

CPC classification number: H01L21/84 ,  H01L21/743 ,  H01L27/1203 ,  H01L29/4238 ,  H01L29/7833

Abstract: The present disclosure relates to a radio frequency (RF) switch that includes multiple body-contacted field effect transistor (FET) elements coupled in series. The FET elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die. Conduction paths between the FET elements through the thin-film semiconductor device layer and through a substrate of the thin-film semiconductor die may be substantially eliminated by using insulating materials. Elimination of the conduction paths allows an RF signal across the RF switch to be divided across the series coupled FET elements, such that each FET element is subjected to only a portion of the RF signal. Further, each FET element is body-contacted and may receive reverse body biasing when the RF switch is in an OFF state, thereby reducing an OFF state drain-to-source capacitance of each FET element.

Abstract translation: 本发明涉及射频（RF）开关，其包括串联耦合的多个体接触场效应晶体管（FET）元件。 可以使用作为薄膜半导体管芯的一部分的薄膜半导体器件层来形成FET元件。 通过薄膜半导体器件层和通过薄膜半导体晶片的衬底的FET元件之间的导通路径可以通过使用绝缘材料基本上消除。 消除导通路径允许跨越RF开关的RF信号在串联耦合的FET元件之间被划分，使得每个FET元件仅受到RF信号的一部分的影响。 此外，当RF开关处于OFF状态时，每个FET元件被体接触并且可以接收反向主体偏置，从而降低每个FET元件的截止状态漏极 - 源极电容。

公开(公告)号：US20140306324A1

公开(公告)日：2014-10-16

申请号：US14315765

申请日：2014-06-26

Applicant: RF Micro Devices, Inc.

Inventor： Julio Costa ,  Michael Carroll ,  Daniel Charles Kerr ,  Don Willis ,  Elizabeth Glass

IPC: H01L23/373

CPC classification number: H01L23/3737 ,  H01L21/565 ,  H01L21/6836 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/367 ,  H01L24/13 ,  H01L2221/6834 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure having a first surface and a second surface. A polymer substrate having a high thermal conductivity and a high electrical resistivity is disposed onto the first surface of the semiconductor stack structure. One method includes providing the semiconductor stack structure with the first surface in direct contact with a wafer handle. A next step involves removing the wafer handle to expose the first surface of the semiconductor stack structure. A following step includes disposing a polymer substrate having high thermal conductivity and high electrical resistivity directly onto the first surface of the semiconductor stack structure.

Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括具有第一表面和第二表面的半导体堆叠结构。 具有高导热性和高电阻率的聚合物基板设置在半导体堆叠结构的第一表面上。 一种方法包括提供具有与晶片把手直接接触的第一表面的半导体堆叠结构。 下一步涉及去除晶片把手以暴露半导体堆叠结构的第一表面。 以下步骤包括将具有高导热性和高电阻率的聚合物基材物质直接设置在半导体堆叠结构的第一表面上。

公开(公告)号：US20140252566A1

公开(公告)日：2014-09-11

申请号：US14260909

申请日：2014-04-24

Applicant: RF Micro Devices, Inc.

Inventor： Daniel Charles Kerr ,  Julio Costa ,  Michael Carroll ,  Don Willis ,  Elizabeth Glass

IPC: H01L29/02 ,  H01L21/02

CPC classification number: H01L21/0237 ,  H01L21/568 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3192 ,  H01L23/36 ,  H01L23/3737 ,  H01L29/78606 ,  H01L2224/13022

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure having a first surface and a second surface. A first polymer having a high thermal conductivity and a high electrical resistivity is disposed on the first surface of the semiconductor stack structure. An exemplary method includes providing the semiconductor stack structure with the second surface in direct contact with a wafer handle. A next step involves removing the wafer handle to expose the second surface of the semiconductor stack structure. A following step includes disposing a second polymer having high thermal conductivity and high electrical resistivity directly onto the second surface of the semiconductor stack structure. Additional methods apply silicon nitride layers on the first surface and second surface of the semiconductor stack structure before disposing the first polymer and second polymer to realize the semiconductor device.

Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括具有第一表面和第二表面的半导体堆叠结构。 具有高导热性和高电阻率的第一聚合物设置在半导体堆叠结构的第一表面上。 一种示例性方法包括提供具有与晶片把手直接接触的第二表面的半导体堆叠结构。 下一步涉及去除晶片把手以暴露半导体堆叠结构的第二表面。 以下步骤包括将具有高导热性和高电阻率的第二聚合物直接设置在半导体堆叠结构的第二表面上。 在配置第一聚合物和第二聚合物以实现半导体器件之前，附加方法将氮化硅层应用于半导体叠层结构的第一表面和第二表面。