公开(公告)号：US20240312877A1

公开(公告)日：2024-09-19

申请号：US18670165

申请日：2024-05-21

Applicant: Rohm Co., Ltd.

Inventor： Yoshizo OSUMI ,  Keiji WADA

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49506 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2924/1206 ,  H01L2924/1426

Abstract: A semiconductor device includes a die pad, a first semiconductor element and a second semiconductor element each mounted on the die pad, and an insulating element electrically connected to the first semiconductor element and the second semiconductor element and insulating the first semiconductor element and the second semiconductor element from each other. The semiconductor device further includes a dummy element bonded to the die pad and a first bonding layer bonding the dummy element and the insulating element. The dummy element includes an insulating layer located between the die pad and the first bonding layer in a thickness direction.

公开(公告)号：US20240014159A1

公开(公告)日：2024-01-11

申请号：US18471358

申请日：2023-09-21

Applicant: ROHM CO., LTD.

Inventor： Bungo TANAKA ,  Keiji WADA ,  Satoshi KAGEYAMA

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/495 ,  H01L23/528

CPC classification number: H01L24/13 ,  H01L23/3114 ,  H01L24/05 ,  H01L23/5226 ,  H01L23/49548 ,  H01L23/5283 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/03 ,  H01L2924/01046 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2224/13647 ,  H01L2224/13018 ,  H01L2224/13082 ,  H01L2224/13166 ,  H01L2224/13181 ,  H01L2224/13184 ,  H01L2224/1318 ,  H01L2224/13176 ,  H01L2224/13171 ,  H01L2224/05582 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01029 ,  H01L2924/01022 ,  H01L2924/04941 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01042 ,  H01L2924/01024 ,  H01L2924/01044 ,  H01L2924/01028 ,  H01L24/83 ,  H01L24/32 ,  H01L2224/83801 ,  H01L2224/05147 ,  H01L2224/48465 ,  H01L24/73 ,  H01L24/29 ,  H01L23/562 ,  H01L2224/29101 ,  H01L2224/05012 ,  H01L2224/45124 ,  H01L2224/73265 ,  H01L2224/45144 ,  H01L2924/181 ,  H01L23/53223

Abstract: A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.

公开(公告)号：US20230411281A1

公开(公告)日：2023-12-21

申请号：US18027382

申请日：2021-09-06

Applicant: ROHM CO., LTD.

Inventor： Bungo TANAKA ,  Keiji WADA

IPC: H01L23/522 ,  H01L23/532 ,  H01L23/00 ,  H01L25/18 ,  H01L23/495

CPC classification number: H01L23/5227 ,  H01L23/53295 ,  H01L24/05 ,  H02P23/00 ,  H01L25/18 ,  H01L23/49575 ,  H01L24/06

Abstract: A semiconductor device includes a semiconductor layer that has a principal surface, a first conductive layer that is formed on the principal surface of the semiconductor layer, a first insulating portion that is formed on the principal surface of the semiconductor layer so as to cover the first conductive layer and that includes a first insulating layer of at least three or more layers, a second insulating portion that is formed on the first insulating portion, that has a dielectric constant differing from a dielectric constant of the first insulating layer, and that includes a second insulating layer not included in the first insulating portion, and a second conductive layer that is formed on the second insulating portion, that faces the first conductive layer through the first insulating portion and the second insulating portion, and that is connected to a potential differing from a potential of the first conductive layer.

公开(公告)号：US20250070103A1

公开(公告)日：2025-02-27

申请号：US18790093

申请日：2024-07-31

Applicant: ROHM CO., LTD.

Inventor： Masanobu TSUJI ,  Yoshizo OSUMI ,  Keiji WADA ,  Bungo TANAKA

IPC: H01L25/16 ,  H01F27/28 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: A semiconductor device includes: a first chip including a first circuit; a second chip disposed to be spaced apart from the first chip in a first direction and including a second circuit; and a transformer chip disposed over the first chip and including a transformer. The first circuit and the second circuit are configured to transmit a signal or power via the transformer. The transformer chip includes: an element insulating layer; and an outer coil and an inner coil disposed as the transformer in the element insulating layer. The inner coil is disposed inside the outer coil so as not to overlap the outer coil when viewed from a thickness direction of the element insulating layer.

公开(公告)号：US20240339490A1

公开(公告)日：2024-10-10

申请号：US18744752

申请日：2024-06-17

Applicant: ROHM CO., LTD.

Inventor： Bungo TANAKA ,  Keiji WADA

IPC: H01L23/00 ,  G01R19/00

CPC classification number: H01L28/20 ,  H01L23/564 ,  G01R19/0084

Abstract: A semiconductor device includes a substrate, a lower insulating film that is formed on the substrate, a resistor that is formed on the lower insulating film, and an upper insulating film that is formed on the lower insulating film such as to cover the resistor. The lower insulating film includes a first nitride film and a first SiO-based insulating film that is formed on the first nitride film and the upper insulating film includes a second nitride film. The resistor is formed on the first SiO-based insulating film and a lower surface of a peripheral edge portion of the second nitride film is joined to an upper surface of the first nitride film.

公开(公告)号：US20240332171A1

公开(公告)日：2024-10-03

申请号：US18614921

申请日：2024-03-25

Applicant: ROHM CO., LTD.

Inventor： Keiji WADA

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/495 ,  H01L25/065

CPC classification number: H01L23/5227 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/08 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/08145 ,  H01L2224/08245 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2924/0665 ,  H01L2924/182

Abstract: An insulation chip includes a first unit, and a second unit bonded to the first unit and smaller in size than the first unit in a plan view. The first unit includes a first element insulating layer, a first insulating element buried in the first element insulating layer, and a first electrode pad provided on the first element insulating layer. The second unit includes a second element insulating layer, and a second insulating element buried in the second element insulating layer. In a unit bonding state in which the second unit is bonded to the first unit, the first and second insulating elements are arranged to face each other in a thickness direction of the first element insulating layer, and the first electrode pad is provided at a different position from the second unit in a plan view.

公开(公告)号：US20240186196A1

公开(公告)日：2024-06-06

申请号：US18442283

申请日：2024-02-15

Applicant: ROHM CO., LTD.

Inventor： Bungo TANAKA ,  Yuta KASHITANI ,  Toshiyuki KANAYA ,  Keiji WADA ,  Genki MATSUYAMA

IPC: H01L23/14

CPC classification number: H01L23/145

Abstract: An electronic component includes an underlay resin, and a pad electrode that has a sidewall located on the underlay resin and an uneven portion formed at a lower end portion of the sidewall.

公开(公告)号：US20240030276A1

公开(公告)日：2024-01-25

申请号：US18476339

申请日：2023-09-28

Applicant: ROHM CO., LTD.

Inventor： Keiji WADA ,  Yasushi HAMAZAWA

IPC: H03K17/687 ,  H01L25/16

CPC classification number: H01L28/60 ,  H03K17/687 ,  H01L25/16 ,  H01L2224/48195 ,  H01L2224/48175 ,  H01L24/48

Abstract: An isolator includes an insulation layer and a capacitor embedded in the insulation layer. The capacitor includes: a first electrode portion arranged in the insulation layer and connected to a first pad; a second electrode portion arranged in the insulation layer and connected to a second pad; and an intermediate electrode portion arranged in the insulation layer and not connected to the first electrode portion and the second electrode portion. The intermediate electrode portion includes a first intermediate layer, a second intermediate layer, and a connector connecting the first intermediate layer and the second intermediate layer. The capacitor is formed by coupling the first electrode portion and the second electrode portion through the intermediate electrode portion.

公开(公告)号：US20240022246A1

公开(公告)日：2024-01-18

申请号：US18475216

申请日：2023-09-27

Applicant: ROHM CO., LTD.

Inventor： Keiji WADA ,  Yasushi HAMAZAWA

IPC: H03K17/691 ,  H03K17/06

CPC classification number: H03K17/691 ,  H03K17/063 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: An isolation transformer includes an insulation layer and a transformer. The transformer includes a first coil and a second coil embedded in the insulation layer. The first coil and the second coil are opposed to each other in a thickness-wise direction of the insulation layer. The first coil and the second coil include non-overlapping portions that do not overlap each other in the thickness-wise direction of the insulation layer.

公开(公告)号：US20220208674A1

公开(公告)日：2022-06-30

申请号：US17645357

申请日：2021-12-21

Applicant: ROHM Co., LTD.

Inventor： Keiji WADA ,  Yasushi HAMAZAWA

IPC: H01L23/522

Abstract: Provided is a gate driver that applies a gate voltage to a gate of a switching element, the gate driver including a low voltage circuit that operates when a first voltage is applied, a high voltage circuit that operates when a second voltage is applied, and an insulating chip, in which the insulating chip includes a substrate, an insulating layer, a first insulating element including a first conductor and a second conductor embedded into the insulating layer and arranged to face each other, and a second insulating element including a third conductor and a fourth conductor embedded into the insulating layer and arranged to face each other, and the low voltage circuit and the high voltage circuit are connected through the first insulating element and the second insulating element connected to each other in series and are configured to transmit signals through the first and second insulating elements.