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    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160225711A1

    公开(公告)日：2016-08-04

    申请号：US15098351

    申请日：2016-04-14

    Applicant: ROHM CO., LTD.

    Inventor： Yuichi NAKAO ,  Satoshi KAGEYAMA ,  Masaru NAITOU

    IPC: H01L23/528 ,  H01L23/532 ,  H01L23/522

    CPC classification number: H01L23/528 ,  B23D51/125 ,  H01L21/76802 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/5329 ,  H01L24/05 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079

    Abstract: A semiconductor device includes a semiconductor substrate, a first insulating layer laminated on the semiconductor substrate, a first metal wiring pattern embedded in a wire-forming region of the first insulating layer, a second insulating layer laminated on the first insulating layer, a second metal wiring pattern embedded in a wire-forming region of the second insulating layer and first dummy metal patterns embedded each in a wire-opposed region opposing to the wire-forming region of the second insulating layer and in a non-wire-opposed region opposing to a non-wire-forming region other than the wire-forming region of the second insulating layer, the wire-opposed region and the non-wire-opposed region each in a non-wire-forming region other than the wire-forming region of the first insulating layer.

    Abstract translation: 半导体器件包括半导体衬底，层叠在半导体衬底上的第一绝缘层，嵌入第一绝缘层的引线形成区域中的第一金属布线图案，层压在第一绝缘层上的第二绝缘层，第二绝缘层 埋设在第二绝缘层的导线形成区域中的布线图案和嵌入在与第二绝缘层的引线形成区域相对的布线对置区域中的第一伪金属图案以及与第二绝缘层相对的非线对向区域 除了第二绝缘层的导线形成区域之外的非线形成区域，线对向区域和非线对置区域分别位于除线形成区域之外的非线形成区域中 第一绝缘层。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150061145A1

    公开(公告)日：2015-03-05

    申请号：US14534247

    申请日：2014-11-06

    Applicant: ROHM CO., LTD.

    Inventor： Yuichi NAKAO ,  Satoshi KAGEYAMA ,  Masaru NAITOU

    IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522

    CPC classification number: H01L23/528 ,  B23D51/125 ,  H01L21/76802 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/5329 ,  H01L24/05 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079

    Abstract: The semiconductor device according to the present invention includes a semiconductor substrate, a first insulating layer laminated on the semiconductor substrate, a first metal wiring pattern embedded in a wire-forming region of the first insulating layer, a second insulating layer laminated on the first insulating layer, a second metal wiring pattern embedded in a wire-forming region of the second insulating layer and first dummy metal patterns embedded each in a wire-opposed region opposing to the wire-forming region of the second insulating layer and in a non-wire-opposed region opposing to a non-wire-forming region other than the wire-forming region of the second insulating layer, the wire-opposed region and the non-wire-opposed region each in a non-wire-forming region other than the wire-forming region of the first insulating layer.

    Abstract translation: 根据本发明的半导体器件包括半导体衬底，层叠在半导体衬底上的第一绝缘层，嵌入在第一绝缘层的引线形成区域中的第一金属布线图案，层压在第一绝缘层上的第二绝缘层 层，嵌入在第二绝缘层的线形成区域中的第二金属布线图案和嵌入在与第二绝缘层的线形成区域相对的线对向区域中的第一虚拟金属图案，并且以非线 与第二绝缘层的线形成区域以外的非线形成区域相对的相对区域，线对向区域和非线对置区域各自位于除非线形成区域以外的非线形成区域 第一绝缘层的线形成区域。

    SEMICONDUCTOR DEVICE INCLUDING AN ELECTRODE LOWER LAYER AND AN ELECTRODE UPPER LAYER AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING AN ELECTRODE LOWER LAYER AND AN ELECTRODE UPPER LAYER AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    包括电极下层和电极上层的半导体器件及制造半导体器件的方法

    公开(公告)号：US20160336333A1

    公开(公告)日：2016-11-17

    申请号：US15221756

    申请日：2016-07-28

    Applicant: ROHM CO., LTD.

    Inventor： Yuichi NAKAO

    IPC: H01L27/115 ,  H01L49/02

    CPC classification number: H01L27/11507 ,  H01L27/11502 ,  H01L28/55 ,  H01L28/57 ,  H01L28/60 ,  H01L28/65 ,  H01L28/75

    Abstract: A semiconductor device includes a lower electrode, a ferroelectric film on the lower electrode, an upper electrode on the ferroelectric film, and a first insulating film covering a surface and a side of the upper electrode, a side of the ferroelectric film, and a side of the lower electrode. The first insulating film includes a first opening that exposes a portion of the surface of the upper electrode. A second insulating film covers the first insulating film and includes a second opening that exposes the portion of the surface of the upper electrode through a second opening. A barrier metal is formed in the first opening and the second opening, and is connected to the upper electrode. A connection region in which a material of the barrier metal interacts with a material of the upper electrode extends below an upper-most surface of the upper electrode.

    Abstract translation: 半导体器件包括下电极，下电极上的铁电体膜，铁电体膜上的上电极以及覆盖上电极的表面和侧面的第一绝缘膜，铁电体膜的侧面和侧面 的下电极。 第一绝缘膜包括暴露上电极表面的一部分的第一开口。 第二绝缘膜覆盖第一绝缘膜并且包括通过第二开口暴露上电极的表面的部分的第二开口。 在第一开口和第二开口中形成阻挡金属，并且连接到上电极。 其中阻挡金属的材料与上电极的材料相互作用的连接区域在上电极的最上表面的下方延伸。

    SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR STORAGE DEVICE
    9.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR STORAGE DEVICE 有权
    半导体存储器件及制造半导体存储器件的方法

    公开(公告)号：US20160247810A1

    公开(公告)日：2016-08-25

    申请号：US15146299

    申请日：2016-05-04

    Applicant: ROHM CO., LTD.

    Inventor： Yuichi NAKAO

    IPC: H01L27/115 ,  H01L21/02 ,  H01L21/32 ,  H01L49/02

    CPC classification number: H01L27/11507 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/32 ,  H01L21/76849 ,  H01L21/7687 ,  H01L27/11504 ,  H01L28/55 ,  H01L28/57 ,  H01L28/60 ,  H01L28/82

    Abstract: A semiconductor storage device includes an insulating layer. A ferroelectric capacitor is on the insulating layer and includes a lower electrode, a ferroelectric film, and an upper electrode. An interlayer insulating film is formed on the insulating layer, and has an opening where the ferroelectric capacitor is disposed. A first metal plug is formed in the insulating layer and connected to the lower electrode via the opening. A second metal plug is embedded in the insulating layer outside the ferroelectric capacitor. A hydrogen barrier film covers the ferroelectric capacitor and the interlayer insulating film. An upper surface of the interlayer insulating film is higher than an upper surface of the first metal plug so that a step is therebetween. The lower electrode is formed on the upper surface of the interlayer insulating film, the upper surface of the first metal plug and the step. The upper surface of the interlayer insulating film and the upper surface of the first metal plug are interlinked via a recessed portion of the interlayer insulating film.

    Abstract translation: 半导体存储装置包括绝缘层。 铁电电容器在绝缘层上，并且包括下电极，铁电体膜和上电极。 在绝缘层上形成层间绝缘膜，并且具有布置铁电电容器的开口。 第一金属插塞形成在绝缘层中并通过开口连接到下电极。 第二金属插头嵌入在铁电电容器外部的绝缘层中。 氢阻挡膜覆盖铁电电容器和层间绝缘膜。 层间绝缘膜的上表面高于第一金属插塞的上表面，从而在其之间形成台阶。 下电极形成在层间绝缘膜的上表面，第一金属插塞的上表面和台阶上。 层间绝缘膜的上表面和第一金属插塞的上表面经由层间绝缘膜的凹部相互连接。

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