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公开(公告)号：US07323142B2
公开(公告)日：2008-01-29
申请号：US10038276
申请日：2002-01-02
申请人： Shaun Pendo , Rajiv Shah , Edward Chernoff
发明人： Shaun Pendo , Rajiv Shah , Edward Chernoff
CPC分类号： H05K3/28 , A61B5/0006 , H05K1/0306 , H05K3/4061 , H05K2201/0175 , H05K2201/0179 , H05K2201/0317 , H05K2201/09472 , H05K2203/082 , H05K2203/085 , H05K2203/1147 , H05K2203/1476 , H05K2203/1572 , H05K2203/308
摘要： A substrate with hermetically sealed vias extending from one side of the substrate to another and a method for fabricating same. The vias may be filled with a conductive material such as, for example, a fritless ink. The conductive path formed by the conductive material aids in sealing one side of the substrate from another. One side of the substrate may include a sensing element and another side of the substrate may include sensing electronics.
摘要翻译： 具有从衬底的一侧延伸到另一侧的气密密封通孔的衬底及其制造方法。 通孔可以填充有导电材料，例如无油墨。 由导电材料形成的导电路径有助于将基板的一侧与另一侧密封。 衬底的一侧可以包括感测元件，并且衬底的另一侧可以包括感测电子器件。
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2.发明申请公开(公告)号：US20060189044A1
公开(公告)日：2006-08-24
申请号：US11395457
申请日：2006-03-31
申请人： Rajiv Shah , Shaun Pendo
发明人： Rajiv Shah , Shaun Pendo
IPC分类号： H01L21/8232 , H01L21/335
CPC分类号： H05K3/467 , H01L21/4857 , H01L21/4867 , H01L2924/0002 , H01L2924/19107 , H05K1/162 , H05K3/048 , H05K3/4053 , H05K3/4061 , H05K3/4664 , H05K2201/0179 , H05K2203/0278 , H05K2203/085 , H05K2203/1476 , H05K2203/308 , H01L2924/00
摘要： A multilayer circuit substrate for multi-chip modules or hybrid circuits includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by shadow mask techniques. Substrates formed in this manner enable significant increases in interconnect density and significant reduction of over-all substrate thickness.
摘要翻译： 用于多芯片模块或混合电路的多层电路衬底包括电介质基底，形成在基底衬底上的导体和形成在导体和基底衬底上的真空沉积的电介质薄膜。 使用由荫罩技术形成的牺牲结构对真空沉积的电介质薄膜进行图案化。 以这种方式形成的基板能够显着增加互连密度并显着降低总体衬底厚度。
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公开(公告)号：US11553862B2
公开(公告)日：2023-01-17
申请号：US16625884
申请日：2018-06-22
申请人： PERCUSENNE , Rajiv Shah , Bradley Liang , Katherine Wolfe , Ellen Messer , Shaun Pendo
发明人： Rajiv Shah , Bradley Liang , Katherine Wolfe , Ellen Messer , Shaun Pendo
IPC分类号： A61B5/1455 , A61B5/1486 , A61B5/00 , G01N33/50 , C12Q1/00
摘要： An electrode measuring the presence of an analyte is described as one embodiment. The electrode includes a working conductor with an electrode reactive surface and a first reactive chemistry that is responsive to the analyte. The electrode further includes a first transport material that enables flux of the first analyte to the first reactive chemistry and a second transport material that supplies a reactant to the first reactive chemistry. Wherein the first reactive chemistry does not contact the electrode reactive surface while at least partially shadowing a portion of the electrode reactive surface.
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公开(公告)号：US07138330B2
公开(公告)日：2006-11-21
申请号：US10671996
申请日：2003-09-26
申请人： Rajiv Shah , Shaun Pendo
发明人： Rajiv Shah , Shaun Pendo
IPC分类号： H01L21/4763
CPC分类号： H05K3/467 , H01L21/4857 , H01L21/4867 , H01L2924/0002 , H01L2924/19107 , H05K1/162 , H05K3/048 , H05K3/4053 , H05K3/4061 , H05K3/4664 , H05K2201/0179 , H05K2203/0278 , H05K2203/085 , H05K2203/1476 , H05K2203/308 , H01L2924/00
摘要： A multilayer circuit substrate for multi-chip modules or hybrid circuits includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by shadow mask techniques. Substrates formed in this manner enable significant increases in interconnect density and significant reduction of over-all substrate thickness.
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5.发明申请Multilayer circuit devices and manufacturing methods using electroplated sacrificial structures 有权多层电路器件和使用电镀牺牲结构的制造方法公开(公告)号：US20050161826A1
公开(公告)日：2005-07-28
申请号：US11086936
申请日：2005-03-22
申请人： Rajiv Shah , Shaun Pendo
发明人： Rajiv Shah , Shaun Pendo
CPC分类号： H05K1/162 , H01L21/4857 , H01L21/4867 , H01L2224/48227 , H01L2224/49171 , H01L2924/19105 , H05K3/048 , H05K3/06 , H05K3/4053 , H05K3/4061 , H05K3/4664 , H05K3/467 , H05K2201/0179 , H05K2203/0278 , H05K2203/085 , H05K2203/1476 , H05K2203/308 , H01L2924/00
摘要： A multilayer circuit includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by electroplating techniques. Substrates formed in this manner enable significant increases in circuit pattern miniaturization, circuit pattern reliability, interconnect density and significant reduction of over-all substrate thickness.
摘要翻译： 多层电路包括介电基底基板，形成在基底基板上的导体和形成在导体和基底基板上的真空沉积的电介质薄膜。 使用通过电镀技术形成的牺牲结构对真空沉积的电介质薄膜进行图案化。 以这种方式形成的衬底使得电路图案的小型化，电路图案可靠性，互连密度显着增加，并且显着降低了全部衬底厚度。
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公开(公告)号：US07577470B2
公开(公告)日：2009-08-18
申请号：US10989038
申请日：2004-11-15
申请人： Rajiv Shah , Rebecca K. Gottlieb , Eric A. Grovender , Shaun Pendo , Paul Citron , William P. Van Antwerp
发明人： Rajiv Shah , Rebecca K. Gottlieb , Eric A. Grovender , Shaun Pendo , Paul Citron , William P. Van Antwerp
IPC分类号： A61B5/00
CPC分类号： A61B5/14865 , A61B5/14532 , A61B5/412 , G01N33/5438
摘要： A long term analyte sensor for measuring at least one analyte in the body of a user and which includes a housing, a plurality of analyte contacting sensor elements and at least one structure for relaying information away from the sensor. This plurality of analyte contacting sensor elements are typically disposed in an array. The analyte sensor further includes at least one sensor protection membrane that is controllable in a manner such that sensor elements may be activated (e.g. exposed to the external environment) at different times so as to extend the useful life of the sensor. In illustrative analyte sensors, the analyte is glucose.
摘要翻译： 一种用于测量使用者身体中的至少一种分析物的长期分析物传感器，其包括壳体，多个分析物接触传感器元件和用于将信息远离传感器中继的至少一个结构。 该多个分析物接触传感器元件通常以阵列方式设置。 分析物传感器还包括至少一个传感器保护膜，该传感器保护膜可以以不同时间使传感器元件被激活（例如暴露于外部环境）的方式被控制，以便延长传感器的使用寿命。 在说明性的分析物传感器中，分析物是葡萄糖。
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公开(公告)号：US07514038B2
公开(公告)日：2009-04-07
申请号：US10861976
申请日：2004-06-04
申请人： Shaun Pendo , Rajiv Shah , Edward Chernoff
发明人： Shaun Pendo , Rajiv Shah , Edward Chernoff
CPC分类号： H05K3/28 , A61B5/0006 , H05K1/0306 , H05K3/4061 , H05K2201/0175 , H05K2201/0179 , H05K2201/0317 , H05K2201/09472 , H05K2203/082 , H05K2203/085 , H05K2203/1147 , H05K2203/1476 , H05K2203/1572 , H05K2203/308
摘要： A substrate with hermetically sealed vias extending from one side of the substrate to another and a method for fabricating same. The vias may be filled with a conductive material such as, for example, a fritless ink. The conductive path formed by the conductive material aids in sealing one side of the substrate from another. One side of the substrate may include a sensing element and another side of the substrate may include sensing electronics.
摘要翻译： 具有从衬底的一侧延伸到另一侧的气密密封通孔的衬底及其制造方法。 通孔可以填充有导电材料，例如无油墨。 由导电材料形成的导电路径有助于将基板的一侧与另一侧密封。 衬底的一侧可以包括感测元件，并且衬底的另一侧可以包括感测电子器件。
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8.发明申请Alumina insulation for coating implantable components and other microminiature devices 有权用于涂层可植入组件和其他微型设备的氧化铝绝缘公开(公告)号：US20050233172A1
公开(公告)日：2005-10-20
申请号：US11150547
申请日：2005-06-10
申请人： Joseph Schulman , Joseph Lucisano , Rajiv Shah , Charles Byers , Shaun Pendo
发明人： Joseph Schulman , Joseph Lucisano , Rajiv Shah , Charles Byers , Shaun Pendo
IPC分类号： A61L2/00 , A61N1/02 , B05D3/00 , B32B9/00 , C23C14/00 , C23C14/04 , G03F1/00 , G03F7/20 , H01L21/308 , H01L23/29 , H05K3/28
CPC分类号： G03F7/70641 , A61N1/02 , A61N1/375 , C23C14/042 , H01L21/308 , H01L23/291 , H01L2924/0002 , H05K3/284 , Y10T29/49144 , Y10T428/24802 , Y10T428/24917 , Y10T428/24926 , Y10T428/265 , H01L2924/00
摘要： A protective, biocompatible coating or encapsulation material protects and insulates a component or device intended to be implanted in living tissue. The coating or encapsulation material comprises a thin layer or layers of alumina, zerconia, or other ceramic, less than 25 microns thick, e.g., 5-10 microns thick. The alumina layer(s) may be applied at relatively low temperature. Once applied, the layer provides excellent hermeticity, and prevents electrical leakage. Even though very thin, the alumina layer retains excellent insulating characteristics. In one embodiment, an alumina layer less than about 6 microns thick provides an insulative coating that exhibits less than 10 pA of leakage current over an area 75 mils by 25 mils area while soaking in a saline solution at temperatures up to 80° C. over a three month period.
摘要翻译： 保护性的，生物相容的涂层或包封材料保护和绝缘想要植入生物体组织的组件或装置。 涂层或包封材料包括薄层或多层氧化铝，稀土或其它小于25微米厚，例如5-10微米厚的陶瓷。 氧化铝层可以在相对较低的温度下施加。 一旦施加，该层提供优异的气密性，并防止漏电。 即使非常薄，氧化铝层保持优异的绝缘特性。 在一个实施方案中，小于约6微米厚的氧化铝层提供了一种绝缘涂层，其在75密耳25密耳面积的面积上表现出低于10pA的漏电流，同时在高达80℃的温度下浸入盐水溶液中 一个三个月的时间。
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公开(公告)号：US08821793B2
公开(公告)日：2014-09-02
申请号：US11924402
申请日：2007-10-25
申请人： Shaun Pendo , Rajiv Shah , Edward Chernoff
发明人： Shaun Pendo , Rajiv Shah , Edward Chernoff
CPC分类号： H05K3/28 , A61B5/0006 , H05K1/0306 , H05K3/4061 , H05K2201/0175 , H05K2201/0179 , H05K2201/0317 , H05K2201/09472 , H05K2203/082 , H05K2203/085 , H05K2203/1147 , H05K2203/1476 , H05K2203/1572 , H05K2203/308
摘要： A substrate with hermetically sealed vias extending from one side of the substrate to another and a method for fabricating same. The vias may be filled with a conductive material such as, for example, a fritless ink. The conductive path formed by the conductive material aids in sealing one side of the substrate from another. One side of the substrate may include a sensing element and another side of the substrate may include sensing electronics.
摘要翻译： 具有从衬底的一侧延伸到另一侧的气密密封通孔的衬底及其制造方法。 通孔可以填充有导电材料，例如无油墨。 由导电材料形成的导电路径有助于将基板的一侧与另一侧密封。 衬底的一侧可以包括感测元件，并且衬底的另一侧可以包括感测电子器件。
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10.发明授权Multilayer circuit devices and manufacturing methods using electroplated sacrificial structures 有权多层电路器件和使用电镀牺牲结构的制造方法公开(公告)号：US08003513B2
公开(公告)日：2011-08-23
申请号：US11086936
申请日：2005-03-22
申请人： Rajiv Shah , Shaun Pendo
发明人： Rajiv Shah , Shaun Pendo
IPC分类号： H01L21/4763
CPC分类号： H05K1/162 , H01L21/4857 , H01L21/4867 , H01L2224/48227 , H01L2224/49171 , H01L2924/19105 , H05K3/048 , H05K3/06 , H05K3/4053 , H05K3/4061 , H05K3/4664 , H05K3/467 , H05K2201/0179 , H05K2203/0278 , H05K2203/085 , H05K2203/1476 , H05K2203/308 , H01L2924/00
摘要： A multilayer circuit includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by electroplating techniques. Substrates formed in this manner enable significant increases in circuit pattern miniaturization, circuit pattern reliability, interconnect density and significant reduction of over-all substrate thickness.
摘要翻译： 多层电路包括介电基底基板，形成在基底基板上的导体和形成在导体和基底基板上的真空沉积的电介质薄膜。 使用通过电镀技术形成的牺牲结构对真空沉积的电介质薄膜进行图案化。 以这种方式形成的衬底使得电路图案的小型化，电路图案可靠性，互连密度显着增加，并且显着降低了全部衬底厚度。
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