利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

103 条记录 (耗时 0.059 秒)

    METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL INSTRUCTIONS
    3.
    发明申请
    METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL INSTRUCTIONS 审中-公开
    方法，装置和系统的交互式分析控制指令

    公开(公告)号：US20150032998A1

    公开(公告)日：2015-01-29

    申请号：US13997243

    申请日：2012-02-02

    申请人： Ravi Rajwar ,  Martin G. Dixon ,  Konrad K. Lai ,  Alexandre J. Farcy ,  Bret L. Toll ,  Robert S. Chappell ,  Matthew C. Merten ,  Rajesh S. Parthasarathy ,  Per Hammarlund

    发明人： Ravi Rajwar ,  Martin G. Dixon ,  Konrad K. Lai ,  Alexandre J. Farcy ,  Bret L. Toll ,  Robert S. Chappell ,  Matthew C. Merten ,  Rajesh S. Parthasarathy ,  Per Hammarlund

    IPC分类号： G06F9/30

    CPC分类号： G06F9/30181 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/30145 ,  G06F9/3834 ,  G06F9/3851 ,  G06F9/3859

    摘要： An apparatus and method is described herein for providing speculation control instructions. An xAcquire and xRelease instruction are provided to define a critical section. In one embodiment, the xAcquire instruction includes a lock instruction with an elision prefix and the xRelease instruction includes a lock release instruction with an elision prefix. As a result, a processor is able to elide locks and transactionally execute a critical section defined in software by xAcquire and xRelease. But by adding only prefix hints, legacy processor are able to execute the same code by just ignoring the hints and executing the critical section traditionally with locks to guarantee mutual exclusion. Moreover, xBegin and xEnd are similarly provided for in an Instruction Set Architecture (ISA) to define a transactional code region. In addition, other control speculation instructions, such as xAbort to enable explicit abort of a critical or transactional code section and xTest to test a state of speculative execution is also provided in the ISA.

    摘要翻译： 这里描述了一种用于提供猜测控制指令的装置和方法。 提供xAcquire和xRelease指令来定义关键部分。 在一个实施例中，xAcquire指令包括具有检验前缀的锁定指令，并且xRelease指令包括具有检验前缀的锁定释放指令。 因此，处理器能够通过xAcquire和xRelease来删除锁定和事务性地执行在软件中定义的关键部分。 但是通过仅添加前缀提示，传统处理器能够通过忽略提示并执行传统的锁定关键部分来保证互斥，从而执行相同的代码。 此外，xBegin和xEnd在指令集架构（ISA）中类似地提供以定义事务代码区域。 此外，还在ISA中提供了其他控制推测指令，例如xAbort，以实现关键或事务代码段的显示中止，以及xTest测试推测执行状态。

    METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL INSTRUCTIONS
    4.
    发明申请
    METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL INSTRUCTIONS 审中-公开
    方法，装置和系统的交互式分析控制指令

    公开(公告)号：US20140379996A1

    公开(公告)日：2014-12-25

    申请号：US13997245

    申请日：2012-02-02

    申请人： Ravi Rajwar ,  Martin G. Dixon ,  Konrad K. Lai ,  Robert S. Chappell ,  Bret L. Toll

    发明人： Ravi Rajwar ,  Martin G. Dixon ,  Konrad K. Lai ,  Robert S. Chappell ,  Bret L. Toll

    IPC分类号： G06F9/52 ,  G06F12/08 ,  G06F9/46

    摘要： An apparatus and method is described herein for providing speculative escape instructions. Specifically, an explicit non-transactional load operation is described herein. During execution of a speculative code region (e.g. a transaction or critical section) loads are normally tracked in a read set. However, a programmer or compiler may utilize the explicit non-transactional read to load from a memory address into a destination register, while not adding the read/load to the transactional read set. Similarly, a non-transactional store is also provided. Here, a transactional store is performed and not added to a write set during speculative code execution. And the store may be immediately globally visible and/or persistent (even after an abort of the speculative code region). In other words, speculative escape operations are provided to ‘escape’ a speculative code region to perform non-transactional memory accesses without causing the speculative code region to abort or fail.

    摘要翻译： 这里描述了一种用于提供推测逃逸指令的装置和方法。 具体地，本文描述了显式的非事务性加载操作。 在推测性代码区域（例如交易或关键部分）的执行期间，通常在读取集合中跟踪负载。 然而，程序员或编译器可以利用显式的非事务性读取从存储器地址加载到目标寄存器中，而不将读取/加载添加到事务读取集合。 同样，也提供非事务存储。 这里，在推测性代码执行期间执行事务存储并且不添加到写入集合。 并且商店可能立即全局可见和/或持久（即使在推测性代码区域中止之后）。 换句话说，提供推测性逃避操作以“逃逸”推测性代码区域以执行非事务性存储器访问，而不会导致推测性代码区域中止或失败。