公开(公告)号：US07701070B1

公开(公告)日：2010-04-20

申请号：US11633968

申请日：2006-12-04

申请人： Richard C. Li ,  Abu K. Eghan ,  Qi Lin

发明人： Richard C. Li ,  Abu K. Eghan ,  Qi Lin

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/528 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/4943 ,  H01L2224/85424 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit device is described. In particular, the integrated circuit comprises a substrate comprising active devices; a plurality of metal layers formed over the substrate, the plurality of metal layers being separated by insulating layers; a plurality of vias enabling connections to the active devices of the substrate; a contact pad support structure defining an opening in a metal layer of the plurality of metal layers and being coupled to an interconnect line; and a contact pad formed over the contact pad support structure. A method of implementing a contact pad in an integrated circuit is also disclosed.

摘要翻译： 描述集成电路器件。 特别地，集成电路包括：包括有源器件的衬底; 形成在所述基板上的多个金属层，所述多个金属层被绝缘层分隔开; 多个通孔，其能够连接到衬底的有源器件; 接触垫支撑结构，其限定所述多个金属层的金属层中的开口并且耦合到互连线; 以及形成在接触垫支撑结构上的接触垫。 还公开了一种在集成电路中实现接触焊盘的方法。

公开(公告)号：US07064450B1

公开(公告)日：2006-06-20

申请号：US10842756

申请日：2004-05-11

申请人： Abu K. Eghan ,  Richard C. Li ,  Xin X. Wu

发明人： Abu K. Eghan ,  Richard C. Li ,  Xin X. Wu

IPC分类号： H01L23/48

CPC分类号： H01L24/06 ,  H01L22/32 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/4943 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01067 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A pad pattern of a die includes first and second sets of elongated pads. The first set of elongated pads is interleaved with the second set of elongated pads. Each of the elongated pads has a bond pad area and a probe pad. Each bond pad area has a first constant width along a substantial portion thereof. Similarly, each probe pad area has a second constant width along a substantial portion thereof. The first constant width is greater than the second constant width. Each elongated pad in the first set has a first orientation. Similarly, each elongated pad in the second set has a second orientation, opposite the first orientation.

摘要翻译： 模具的衬垫图案包括第一组和第二组细长衬垫。 第一组细长垫与第二组细长垫交错。 每个细长垫具有接合垫区域和探针垫。 每个接合焊盘区域沿其主要部分具有第一恒定宽度。 类似地，每个探针焊盘区域沿其主要部分具有第二恒定宽度。 第一恒定宽度大于第二恒定宽度。 第一组中的每个细长垫具有第一取向。 类似地，第二组中的每个细长垫具有与第一取向相反的第二取向。

公开(公告)号：US07061102B2

公开(公告)日：2006-06-13

申请号：US09879875

申请日：2001-06-11

申请人： Abu K. Eghan ,  Lan H. Hoang

发明人： Abu K. Eghan ,  Lan H. Hoang

IPC分类号： H01L23/34 ,  H01L22/04

CPC分类号： H01L23/4334 ,  H01L23/055 ,  H01L23/10 ,  H01L23/13 ,  H01L23/24 ,  H01L23/49822 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/18161 ,  H01L2224/0401

摘要： A semiconductor flipchip package includes a central cavity area on the first major side for receiving a flipchip die therein. The package substrate is substantially made from a single material that serves as the support and stiffener and provides within the cavity floor all the connecting points for flipchip interconnection to the silicon die. The integral cavity wall serves as a stiffener member of the package and provides the required mechanical stability of the whole arrangement without the need for a separate stiffener material to be adhesively attached. The cavity walls may contain extra routing metallization to create bypass capacitors to enhance electrical performance. Optional methods to cover the silicon die enhance thermal performance of the package.

摘要翻译： 半导体倒装芯片封装包括在第一主侧上的用于在其中接收倒装芯片裸片的中心腔区域。 封装衬底基本上由用作支撑和加强件的单一材料制成，并且在空腔底板内提供所有连接点以用于芯片与硅管芯的互连。 一体的腔壁用作包装的加强件，并提供整个布置所需的机械稳定性，而不需要单独的加强材料粘合地附接。 空腔壁可以包含额外的路线选择性金属化以产生旁路电容器以增强电性能。 覆盖硅芯片的可选方法提高了封装的热性能。