公开(公告)号：US07061102B2

公开(公告)日：2006-06-13

申请号：US09879875

申请日：2001-06-11

申请人： Abu K. Eghan ,  Lan H. Hoang

发明人： Abu K. Eghan ,  Lan H. Hoang

IPC分类号： H01L23/34 ,  H01L22/04

CPC分类号： H01L23/4334 ,  H01L23/055 ,  H01L23/10 ,  H01L23/13 ,  H01L23/24 ,  H01L23/49822 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/18161 ,  H01L2224/0401

摘要： A semiconductor flipchip package includes a central cavity area on the first major side for receiving a flipchip die therein. The package substrate is substantially made from a single material that serves as the support and stiffener and provides within the cavity floor all the connecting points for flipchip interconnection to the silicon die. The integral cavity wall serves as a stiffener member of the package and provides the required mechanical stability of the whole arrangement without the need for a separate stiffener material to be adhesively attached. The cavity walls may contain extra routing metallization to create bypass capacitors to enhance electrical performance. Optional methods to cover the silicon die enhance thermal performance of the package.

摘要翻译： 半导体倒装芯片封装包括在第一主侧上的用于在其中接收倒装芯片裸片的中心腔区域。 封装衬底基本上由用作支撑和加强件的单一材料制成，并且在空腔底板内提供所有连接点以用于芯片与硅管芯的互连。 一体的腔壁用作包装的加强件，并提供整个布置所需的机械稳定性，而不需要单独的加强材料粘合地附接。 空腔壁可以包含额外的路线选择性金属化以产生旁路电容器以增强电性能。 覆盖硅芯片的可选方法提高了封装的热性能。

公开(公告)号：US07696006B1

公开(公告)日：2010-04-13

申请号：US12098053

申请日：2008-04-04

申请人： Lan H. Hoang ,  Paul Ying-Fung Wu

发明人： Lan H. Hoang ,  Paul Ying-Fung Wu

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/50 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/642 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83102 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Composite flip-chip with encased components and method of fabricating the same is described. One aspect of the invention relates to fabricating composite flip-chip packages for integrated circuit dice. Interposing substrates are formed. At least one discrete component is attached to a bottom surface of each of the interposing substrates. A first array of solder balls is placed on the bottom surface of each of the interposing substrates. The interposing substrates are mounted to a carrier strip. The integrated circuit dice are attached to top surfaces of the interposing substrates. The integrated circuit dice and the interposing substrates are encapsulated in molding compound to define flip-chip assemblies.

摘要翻译： 描述了具有封装组件的复合倒装芯片及其制造方法。 本发明的一个方面涉及制造用于集成电路芯片的复合倒装芯片封装。 形成介质基板。 至少一个分立的部件附接到每个插入基板的底表面。 第一阵列的焊球被放置在每个插入基板的底表面上。 插入基板安装到载体条上。 集成电路芯片附着到插入式基板的顶表面。 集成电路芯片和插入基板被封装在模制化合物中以限定倒装芯片组件。

公开(公告)号：US06201301B1

公开(公告)日：2001-03-13

申请号：US09010414

申请日：1998-01-21

申请人： Lan H. Hoang

发明人： Lan H. Hoang

IPC分类号： H01L2334

CPC分类号： H01L21/563 ,  H01L23/4334 ,  H01L24/31 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83951 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/16195 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2924/01007 ,  H01L2224/13111 ,  H01L2924/00012 ,  H01L2924/0665

摘要： An electronic device or flip chip includes a chip having an active side and an opposed side, with the active side electrically connected by bumps with the top of a substrate. A first material or underfill, generally located between the chip and the substrate, is resistive to electrical conductivity to isolate the flip chip bumps and their contacts. A second electrically conductive material is formed on a portion of the top of the substrate, the opposed side of the chip and over the first material to completely cover and protect the opposed side. The second material preferably has 80-95% metal fillers and is at least 75 microns (0.075 millimeters) thick. The second thermally/electrically conductive material transfers heat from the opposed or back side of the chip to provide a low cost flip chip package with comparable thermal performance to a flip chip with a heat spreader and a stiffener. Savings in cost of materials and processing is achieved by the elimination of at least the heat spreader and, when desired, the stiffener.

摘要翻译： 电子器件或倒装芯片包括具有有源侧和相对侧的芯片，其中该有源侧通过具有衬底顶部的凸块电连接。 通常位于芯片和衬底之间的第一材料或底部填充剂具有电导率以隔离倒装芯片凸块及其触点。 第二导电材料形成在基板的顶部的一部分，芯片的相对侧和第一材料之上，以完全覆盖和保护相对侧。 第二种材料优选具有80-95％的金属填料并且厚度至少为75微米（0.075毫米）。 第二导热材料从芯片的相对或背面传输热量，以提供与具有散热器和加强件的倒装芯片相当的热性能的低成本倒装芯片封装。 通过消除至少散热器和需要时的加强件来实现材料和加工成本的节省。

公开(公告)号：US07378733B1

公开(公告)日：2008-05-27

申请号：US11511969

申请日：2006-08-29

申请人： Lan H. Hoang ,  Paul Ying-Fung Wu

发明人： Lan H. Hoang ,  Paul Ying-Fung Wu

IPC分类号： H01L23/34

CPC分类号： H01L23/50 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/642 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83102 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Composite flip-chip with encased components and method of fabricating the same is described. One aspect of the invention relates to fabricating composite flip-chip packages for integrated circuit dice. Interposing substrates are formed. At least one discrete component is attached to a bottom surface of each of the interposing substrates. A first array of solder balls is placed on the bottom surface of each of the interposing substrates. The interposing substrates are mounted to a carrier strip. The integrated circuit dice are attached to top surfaces of the interposing substrates. The integrated circuit dice and the interposing substrates are encapsulated in molding compound to define flip-chip assemblies.

摘要翻译： 描述了具有封装组件的复合倒装芯片及其制造方法。 本发明的一个方面涉及制造用于集成电路芯片的复合倒装芯片封装。 形成介质基板。 至少一个分立的部件附接到每个插入基板的底表面。 第一阵列的焊球被放置在每个插入基板的底表面上。 插入基板安装到载体条上。 集成电路芯片附着到插入式基板的顶表面。 集成电路芯片和插入基板被封装在模制化合物中以限定倒装芯片组件。

公开(公告)号：US06373142B1

公开(公告)日：2002-04-16

申请号：US09440492

申请日：1999-11-15

申请人： Lan H. Hoang

发明人： Lan H. Hoang

IPC分类号： H01L2348

CPC分类号： H01L24/27 ,  H01L21/563 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： The present invention provides a semiconductor chip package with a fillet which contains a high percentage of a filler material by weight and a method of assembly with a semiconductor chip package for adding filler material to a non-filled or low-filled underfill system. The method of assembly produces a chip package where the concentration of filler material within the underfill material between the chip and the package substrate may be varied from location to location within the underfill material. The filler material increases the mechanical rigidity of the underfill material after it has hardened. Thus, using the approach of the present invention, the percentage of filler material may be increased in regions of the underfill material where the mechanical stresses require a greater mechanical rigidity. The present invention may be applicable to increasing the reliability of chip packages where the chip and the package substrate are separated by a gap about 25-50 microns wide.

摘要翻译： 本发明提供了一种半导体芯片封装，其具有包含重量百分比高的填充材料的圆角，以及用于将填充材料添加到未填充或填充不足的底部填充系统的半导体芯片封装的组装方法。 组装的方法产生芯片封装，其中芯片和封装衬底之间的底部填充材料内的填充材料的浓度可以在底部填充材料内的位置变化。 填充材料在硬化后增加了底部填充材料的机械刚度。 因此，使用本发明的方法，在机械应力需要更大的机械刚性的底部填充材料的区域中，填充材料的百分比可以增加。 本发明可以应用于提高芯片封装的可靠性，其中芯片和封装衬底被间隔大约25-50微米宽。

公开(公告)号：US07361995B2

公开(公告)日：2008-04-22

申请号：US10543301

申请日：2004-02-03

申请人： Kim Yong Goh ,  Rahul Kapoor ,  Anthony Yi-Sheng Sun ,  Desmond Yok Rue Chong ,  Lan H. Hoang

发明人： Kim Yong Goh ,  Rahul Kapoor ,  Anthony Yi-Sheng Sun ,  Desmond Yok Rue Chong ,  Lan H. Hoang

IPC分类号： H01L29/40

CPC分类号： H01L23/4334 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/1659 ,  H01L2924/167 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2224/0401 ,  H01L2924/00

摘要： A thermally enhanced ball grid array package is disclosed. The package includes a base layer element and a flip chip die mounted on the base layer element. The die has a first surface electrically coupled to the base layer element, a second surface opposite to the first surface, and lateral sides. A molding compound encapsulates the base layer element and the lateral sides of the die. A surface is formed of the second surface of the die and an upper surface of the molding compound. A material is disposed on the surface, and a heat spreader is mounted on the material.

摘要翻译： 公开了一种热增强球栅阵列封装。 封装包括安装在基底层元件上的基底元件和倒装芯片裸片。 模具具有电耦合到基层元件的第一表面，与第一表面相对的第二表面和横向侧面。 模制化合物封装基底层元件和模具的侧面。 表面由模具的第二表面和模塑料的上表面形成。 材料设置在表面上，散热器安装在材料上。

公开(公告)号：US07098542B1

公开(公告)日：2006-08-29

申请号：US10703327

申请日：2003-11-07

申请人： Lan H. Hoang ,  Paul Ying-Fung Wu

发明人： Lan H. Hoang ,  Paul Ying-Fung Wu

IPC分类号： H01L23/48 ,  H01L23/02

CPC分类号： H01L25/0652 ,  H01L23/13 ,  H01L23/24 ,  H01L24/73 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/731 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/16152 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor structure includes a carrier having a cavity formed in a top portion thereof, and a plurality of conductive contacts formed on a top surface of the carrier and positioned around the periphery of the cavity. A number of first coplanar dice are back-side mounted to a top surface of the cavity, and a number of second coplanar dice are flip-chip mounted to the first dice, wherein each of the first dice is electrically connected to two corresponding adjacent second dice to connect the dice in a cascade configuration. For some embodiments, selected dice are flip-chip mounted to the carrier. For other embodiments, selected dice are wire-bond connected to the carrier.

摘要翻译： 半导体结构包括具有在其顶部形成的空腔的载体和形成在载体的顶表面上并位于空腔的周边周围的多个导电触头。 多个第一共面骰子被背面安装到空腔的顶表面，并且多个第二共面骰子被倒装安装到第一骰子，其中第一骰子中的每一个电连接到两个对应的相邻的第二骰子 骰子以级联配置连接骰子。 对于一些实施例，所选择的芯片被倒装芯片安装到载体上。 对于其他实施例，所选择的骰子与引线连接到载体上。

公开(公告)号：US5942795A

公开(公告)日：1999-08-24

申请号：US887955

申请日：1997-07-03

申请人： Lan H. Hoang

发明人： Lan H. Hoang

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L23/49838 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/97 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L23/3121 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30107

摘要： Leaded substrates carriers and packaged integrated circuit devices that utilize such carriers as well as method of manufacturing the same are disclosed. The substrate carrier comprises a series of conductor lines for electrically connecting the active side of the chip to leads formed as part of the substrate carrier and extending from the side of the substrate carrier. The leads extend beyond the sides of the substrate carrier and have planar metal surfaces designed to allow surface mounting and testing of the assembly.

摘要翻译： 公开了使用这种载体的引线基板载体和封装的集成电路器件及其制造方法。 衬底载体包括用于将芯片的有源侧电连接到作为衬底载体的一部分并且从衬底载体的侧面延伸的引线的一系列导体线。 导线延伸超过基板载体的侧面，并具有设计成允许组件的表面安装和测试的平面金属表面。

公开(公告)号：US07906857B1

公开(公告)日：2011-03-15

申请号：US12047676

申请日：2008-03-13

申请人： Lan H. Hoang ,  Raghunandan Chaware ,  Laurene Yip

发明人： Lan H. Hoang ,  Raghunandan Chaware ,  Laurene Yip

IPC分类号： H01L23/48

CPC分类号： H01L23/4334 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012

摘要： A molded integrated circuit package is described. The molded integrated circuit package comprises a substrate having a plurality of contacts on a first surface; a die having a plurality of solder bumps on a first surface, the plurality of solder bumps being coupled to the plurality of contacts on the first surface of the substrate; an adhesive material positioned on a second surface of the die; a lid attached to the adhesive material; and an encapsulant positioned between the lid and the substrate. Methods of forming molded integrated circuit packages are also disclosed.

摘要翻译： 描述了模制的集成电路封装。 模制的集成电路封装包括在第一表面上具有多个触点的基板; 在第一表面上具有多个焊料凸块的模具，所述多个焊料凸点与所述基板的第一表面上的所述多个触点耦合; 位于所述模具的第二表面上的粘合剂材料; 附着在粘合剂材料上的盖子; 以及位于盖和基板之间的密封剂。 还公开了形成模制集成电路封装的方法。