利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

182 条记录 (耗时 0.051 秒)

    Floating input amplifier for capacitively coupled communication
    1.
    发明授权
    Floating input amplifier for capacitively coupled communication 有权
    用于电容耦合通信的浮动输入放大器

    公开(公告)号：US07026867B2

    公开(公告)日：2006-04-11

    申请号：US10879606

    申请日：2004-06-28

    申请人： Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    发明人： Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    IPC分类号： H03F1/02

    CPC分类号： H03F3/45977 ,  H03F3/08

    摘要： One embodiment of the present invention provides a capacitively-coupled receiver amplifier that has an input with no DC coupling. A DC voltage is programmed on the input. During programming, a transmitter is held at a voltage at a midpoint between a voltage that represents a logical “1” and a voltage that represents a logical “0” and the input voltage of the receiver amplifier is programmed to be substantially the switching-threshold voltage for the receiver amplifier. Then, during normal data communication, the transmitter drives high and low electrical signals that are coupled to the receiver amplifier. Since the input of the receiver amplifier has been substantially set to the DC voltage, the receiver amplifier need not control the DC voltage of the input for each transition in the electrical signals.

    摘要翻译： 本发明的一个实施例提供一种具有不具有直流耦合的输入的电容耦合接收放大器。 在输入端编程一个直流电压。 在编程期间，发射机被保持在表示逻辑“1”的电压和表示逻辑“0”的电压之间的中点处的电压，并且接收机放大器的输入电压被编程为基本上是切换阈值 接收放大器的电压。 然后，在正常数据通信期间，发射机驱动耦合到接收放大器的高电平和低电信号。 由于接收机放大器的输入已基本设置为直流电压，所以接收放大器不需要控制电信号中每个转换的输入的直流电压。

    Enhanced electrically-aligned proximity communication
    2.
    发明授权
    Enhanced electrically-aligned proximity communication 有权
    增强的电对齐邻近通信

    公开(公告)号：US07200830B2

    公开(公告)日：2007-04-03

    申请号：US10879607

    申请日：2004-06-28

    申请人： Robert J. Drost ,  Ivan E. Sutherland ,  Ronald Ho

    发明人： Robert J. Drost ,  Ivan E. Sutherland ,  Ronald Ho

    IPC分类号： G06F17/50

    CPC分类号： H01L23/48 ,  H01L25/0657 ,  H01L2225/06531 ,  H01L2924/0002 ,  H01L2924/00

    摘要： One embodiment of the present invention provides a system that facilitates capacitive inter-chip communication. During operation, the system first determines an alignment between a first semiconductor die and a second semiconductor die. Next, electrical signals are selectively routed to at least one interconnect pad in a plurality of interconnect pads based on the alignment thereby facilitating communication between the first semiconductor die and the second semiconductor die. The plurality of interconnect pads can include transmitting pads, receiving pads, and transmitting and receiving pads. The alignment may be determined continuously or at times separated by an interval, where the interval is fixed or variable. Several variations on this embodiment are provided.

    摘要翻译： 本发明的一个实施例提供一种便于电容芯片间通信的系统。 在操作期间，系统首先确定第一半导体管芯和第二半导体管芯之间的对准。 接下来，基于对准，电信号被选择性地路由到多个互连焊盘中的至少一个互连焊盘，从而便于第一半导体管芯和第二半导体管芯之间的连通。 多个互连焊盘可以包括传输焊盘，接收焊盘以及发射和接收焊盘。 可以连续地或有时间隔地间隔地确定对准，其中间隔是固定的或可变的。 提供了该实施例的几个变型。

    Full-wave rectifier for capacitance measurements
    3.
    发明授权
    Full-wave rectifier for capacitance measurements 有权
    全波整流电容测量

    公开(公告)号：US07046017B1

    公开(公告)日：2006-05-16

    申请号：US11216754

    申请日：2005-08-30

    申请人： Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    发明人： Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    IPC分类号： G01R27/26 ,  G01N27/22

    CPC分类号： G01R27/2605

    摘要： One embodiment of the present invention provides an electronic circuit and method for measuring a capacitance. A signal generating mechanism generates a signal having a predefined frequency and predefined low and high voltage levels on one terminal of the capacitance. The other terminal of the capacitance is coupled to a switching mechanism. The switching mechanism is set to couple the other terminal of the capacitance to a first amplifier or a second amplifier for a portion of each signal cycle thereby full-wave rectifying a transient current flowing between the two terminals in the capacitance. Outputs of the first amplifier and the second amplifier are coupled to a current measurement mechanism for measuring the current. The capacitance is determined from the measured current. Several variations on this embodiment are provided.

    摘要翻译： 本发明的一个实施例提供一种用于测量电容的电子电路和方法。 信号发生机构在电容的一个端子上产生具有预定频率和预定义的低和高电压电平的信号。 电容的另一个端子耦合到开关机构。 开关机构被设置为将电容的另一个端子耦合到每个信号周期的一部分的第一放大器或第二放大器，由此对在电容中的两个端子之间流动的瞬态电流进行全波整流。 第一放大器和第二放大器的输出耦合到用于测量电流的电流测量机构。 电容由测量电流确定。 提供了该实施例的几个变型。

    Full-wave rectifier for capacitance measurements
    4.
    发明授权
    Full-wave rectifier for capacitance measurements 有权

    公开(公告)号：US06987394B1

    公开(公告)日：2006-01-17

    申请号：US10879608

    申请日：2004-06-28

    申请人： Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    发明人： Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    IPC分类号： G01R27/26

    CPC分类号： G01R27/2605

    摘要： One embodiment of the present invention provides an electronic circuit and method for measuring a capacitance. A signal generating mechanism generates a signal having a predefined frequency and predefined low and high voltage levels on one terminal of the capacitance. The other terminal of the capacitance is coupled to a switching mechanism. The switching mechanism is set to couple the other terminal of the capacitance to a first amplifier or a second amplifier for a portion of each signal cycle thereby full-wave rectifying a transient current flowing between the two terminals in the capacitance. Outputs of the first amplifier and the second amplifier are coupled to a current measurement mechanism for measuring the current. The capacitance is determined from the measured current. Several variations on this embodiment are provided.

    Proximity optical memory module having an electrical-to-optical and optical-to-electrical converter
    7.
    发明授权
    Proximity optical memory module having an electrical-to-optical and optical-to-electrical converter 有权
    接近光学存储器模块，其具有电 - 光和光 - 电转换器

    公开(公告)号：US07786427B2

    公开(公告)日：2010-08-31

    申请号：US12115989

    申请日：2008-05-06

    申请人： Craig S. Forrest ,  Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    发明人： Craig S. Forrest ,  Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    IPC分类号： G01J1/04

    CPC分类号： G11C5/04 ,  G11C5/143 ,  G11C7/1051 ,  G11C7/1054 ,  G11C7/1078 ,  G11C7/1081 ,  H01L23/48 ,  H01L23/642 ,  H01L24/05 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/167 ,  H01L2225/06562 ,  H01L2924/01067 ,  H01L2924/14 ,  H01L2924/19041

    摘要： A memory module is formed of multiple memory chips and an optical interface chip fixed on a substrate. The chips are interconnected by proximity communication (PxC) in which each chip includes transmitting and receiving elements, such as electrical pads which form capacitively coupled links when the chips are placed together with their pads facing each other. The PxC links may be directly between the chips or through an intermediate passive bridge chip. The interface chip is coupled to an external optical channel and includes converters between optical and electrical signals, control circuitry, buffers, and PxC elements for communicating with the memory chips. The array of memories may be a linear or two-dimensional array around the interface chip forming a redundant PxC network, optionally with redundant PxC connections. Multiple rectangular memory chips may present their narrow sides to the interface chip to maximize bandwidth.

    摘要翻译： 存储器模块由多个存储器芯片和固定在基板上的光学接口芯片形成。 芯片通过邻近通信（PxC）相互连接，其中每个芯片包括发射和接收元件，例如当芯片彼此面对放置在一起时形成电容耦合链路的电焊盘。 PxC链路可以直接在芯片之间或通过中间无源桥芯片。 接口芯片耦合到外部光通道并且包括用于与存储器芯片通信的光学和电信号之间的转换器，控制电路，缓冲器和PxC元件。 存储器阵列可以是形成冗余PxC网络的接口芯片周围的线性或二维阵列，可选地具有冗余PxC连接。 多个矩形存储器芯片可以将它们的窄边呈现给接口芯片以最大化带宽。

    PROXIMITY OPTICAL MEMORY MODULE
    8.
    发明申请
    PROXIMITY OPTICAL MEMORY MODULE 有权
    临近光学存储模块

    公开(公告)号：US20090279341A1

    公开(公告)日：2009-11-12

    申请号：US12115989

    申请日：2008-05-06

    申请人： Craig S. Forrest ,  Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    发明人： Craig S. Forrest ,  Robert J. Drost ,  Ronald Ho ,  Ivan E. Sutherland

    IPC分类号： G11C5/06

    CPC分类号： G11C5/04 ,  G11C5/143 ,  G11C7/1051 ,  G11C7/1054 ,  G11C7/1078 ,  G11C7/1081 ,  H01L23/48 ,  H01L23/642 ,  H01L24/05 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/167 ,  H01L2225/06562 ,  H01L2924/01067 ,  H01L2924/14 ,  H01L2924/19041

    摘要： A memory module is formed of multiple memory chips and an optical interface chip fixed on a substrate. The chips are interconnected by proximity communication (PxC) in which each chip includes transmitting and receiving elements, such as electrical pads which form capacitively coupled links when the chips are placed together with their pads facing each other. The PxC links may be directly between the chips or through an intermediate passive bridge chip. The interface chip is coupled to an external optical channel and includes converters between optical and electrical signals, control circuitry, buffers, and PxC elements for communicating with the memory chips. The array of memories may be a linear or two-dimensional array around the interface chip forming a redundant PxC network, optionally with redundant PxC connections. Multiple rectangular memory chips may present their narrow sides to the interface chip to maximize bandwidth.

    摘要翻译： 存储器模块由多个存储器芯片和固定在基板上的光学接口芯片形成。 芯片通过邻近通信（PxC）相互连接，其中每个芯片包括发射和接收元件，例如当芯片彼此面对放置在一起时形成电容耦合链路的电焊盘。 PxC链路可以直接在芯片之间或通过中间无源桥芯片。 接口芯片耦合到外部光通道并且包括用于与存储器芯片通信的光学和电信号之间的转换器，控制电路，缓冲器和PxC元件。 存储器阵列可以是形成冗余PxC网络的接口芯片周围的线性或二维阵列，可选地具有冗余PxC连接。 多个矩形存储器芯片可以将它们的窄边呈现给接口芯片以最大化带宽。

    Method and apparatus for electronically aligning capacitively coupled mini-bars
    9.
    发明授权
    Method and apparatus for electronically aligning capacitively coupled mini-bars 有权
    用于电容对齐电容耦合迷你条的方法和装置

    公开(公告)号：US07384804B2

    公开(公告)日：2008-06-10

    申请号：US11125792

    申请日：2005-05-09

    申请人： Robert J. Drost ,  Ivan E. Sutherland ,  William S. Coates

    发明人： Robert J. Drost ,  Ivan E. Sutherland ,  William S. Coates

    IPC分类号： H01L21/66

    CPC分类号： H01L25/0657 ,  H01L23/48 ,  H01L25/50 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06593 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01067 ,  H01L2224/0401

    摘要： One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system measures an alignment between a first chip and a second chip. The system then selects a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment. In this way, the system allows a data signal to be distributed to and transmitted by the mini-bars that form the transmitter bit position. The system also selects a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment. Next, the system associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment. In this way, the system allows data signals transmitted by the mini-bars within a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.

    摘要翻译： 本发明的一个实施例提供了一种系统，其电子地对准位于面对面的不同半导体芯片上的迷你条，以促进半导体芯片之间通过电容耦合的通信。 在操作期间，系统测量第一芯片和第二芯片之间的对准。 然后，系统在第一芯片上选择一组发射器迷你条，以基于测量的对准来形成发射机位置。 以这种方式，该系统允许将数据信号分配到形成发送器位位置的迷你条并发送。 该系统还在第二芯片上选择一组接收器迷你条，以形成基于测量对准的接收器位位置。 接下来，系统基于测量的对准将第一芯片上的发射机位位置与第二芯片上的接收器位置相关联。 以这种方式，系统允许由第一芯片上的发送器位置内的迷你条发送的数据信号由第二芯片上相关联的接收器位位置内的迷你条集中接收。

    Sense amplifying latch with low swing feedback
    10.
    发明授权
    Sense amplifying latch with low swing feedback 有权
    具有低摆动反馈的感应放大锁存器

    公开(公告)号：US06987412B2

    公开(公告)日：2006-01-17

    申请号：US10816761

    申请日：2004-04-02

    申请人： Ivan E. Sutherland ,  Robert J. Bosnyak ,  Robert J. Drost

    发明人： Ivan E. Sutherland ,  Robert J. Bosnyak ,  Robert J. Drost

    IPC分类号： H03K3/356 ,  H03L5/00

    CPC分类号： H03K5/003 ,  H01L23/48 ,  H01L25/0657 ,  H01L2225/06527 ,  H01L2924/00013 ,  H01L2924/0002 ,  H03K3/037 ,  H03K17/689 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

    摘要： A system is presented for latching and amplifying a capacitively coupled inter-chip communication signal that operates by receiving an input signal on a capacitive receiver pad and feeding the input signal through an inverter to produce an output signal. The output signal is fed back through a weakened inverter to produce a feedback signal that is fed into an input of the inverter to form a latch for the input signal. The weakened inverter is biased to produce a feedback signal that swings between a high bias voltage, VH, and a low bias voltage, VL. VH is set slightly higher than the switching threshold of the inverter, and VL is set slightly lower than the switching threshold. This feedback signal causes the input signal to reside within a narrow voltage range near the switching threshold of the inverter, thereby making the inverter sensitive to small transitions in the input signal.

    摘要翻译： 提出了一种用于锁存和放大电容耦合的芯片间通信信号的系统，其通过接收电容性接收器焊盘上的输入信号并通过反相器馈送输入信号以产生输出信号来操作。 输出信号通过弱化逆变器反馈，产生反馈信号，该反馈信号馈送到反相器的输入端，形成输入信号的锁存器。 弱化的逆变器被偏置以产生在高偏置电压V H H和低偏压V L之间摆动的反馈信号。 V H设定得比逆变器的切换阈值略高，并且将V L L设定得比切换阈值略低。 该反馈信号使得输入信号驻留在接近逆变器的开关阈值的窄电压范围内，从而使得反相器对输入信号中的小转变敏感。