摘要:
In fabricating wafer scale integrated interconnects, a temporary or permanent dielectric layer and a pattern of electrical conductors are used to provide wafer scale integration or testing and burn-in. A resist can be used to cover the areas of IC pads on the wafer while the remainder of the pattern of electrical conductors is removed to provide for repair of the wafer scale integration structure. The pattern of electrical conductors may be configured so that the conductor lengths between at least some sub-circuits on a plurality of wafers are substantially electrically equal for signal propagation purposes; an additional wafer may be laminated to the wafer using an adhesive; controlled curfs may be cut into the wafer; and the wafer may be interconnected to an interface ring.
摘要:
Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate molding material is added within the mold form, and the substrate molding material is then hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips. A thermal plug may be affixed to the backside of a chip before substrate molding material is added. A connector frame may be placed on the adhesive layer before substrate molding material is added. A dielectric layer may be placed over the backsides of the chips before the substrate molding material is added to enhance repairability. A portion of the chips and substrate molding material may be removed after the substrate molding material is hardened.
摘要:
Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate molding material is added within the mold form, and the substrate molding material is then hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips. A thermal plug may be affixed to the backside of a chip before substrate molding material is added. A connector frame may be placed on the adhesive layer before substrate molding material is added. A dielectric layer may be placed over the backsides of the chips before the substrate molding material is added to enhance repairability. A portion of the chips and substrate molding material may be removed after the substrate molding material is hardened.
摘要:
A high voltage P-N diode includes a P.sup.- substrate with a thin N.sup.- epitaxial layer thereon. An N.sup.+ cathode region extends into the N.sup.- epitaxial layer from the upper surface thereof. A P.sup.+ anode region extends into the N.sup.- epitaxial layer from its upper surface and surrounds the N.sup.+ cathode region. An N.sup.+ buried layer is situated between the P.sup.- substrate and the N.sup.- epitaxial layer, beneath the P.sup.+ anode region, and surrounds the N.sup.+ cathode region, as viewed from above. A further P.sup.+ region extends into the N.sup.- epitaxial layer from its upper surface and surrounds the N.sup.+ cathode region, and, in turn, is surrounded by the P.sup.+ anode region. In an exemplary embodiment, a MOSFET is included to alternately connect the further P.sup.+ region to the P.sup.- substrate and to open circuit the further P.sup.+ region. With the further P.sup. + region open circuited, the P-N diode has a low on-resistance when it operates in its current-conducting state. An embodiment structurally similar to the P-N diode comprises a bipolar transistor having an N.sup.+ emitter region extending into a P.sup.+ base region, which corresponds to the P.sup.+ anode region of the diode.
摘要:
An integrated circuit in which a large potential can be maintained between the source of the device and the substrate on which this device and other devices are fabricated is described. The circuit employs a minority carrier sink region to remove minority carriers from the gate region of a MOS depletion device. The sink region is shielded from the substrate by a buried layer which prevents punch-through between the sink region and the substrate.
摘要:
A semiconductor wafer having a substrate with an epitaxial layer thereon includes a semiconductor device electrically isolated from the substrate as well as from any other devices in the wafer by electrical isolation structure comprising semiconductor material. The semiconductor device can accordingly be operated at high voltage with respect to the wafer substrate. The isolation structure in one form of the wafer comprises an N+ high voltage tub included in the wafer and a P+ ground region situated in the expitaxial layer, adjoining the substrate, and horizontally circumscribing the N+ high voltage tub and being spaced therefrom by a minimum layer extent of a portion of the epitaxial layer that is of N conductivity type. The N+ high voltage tub comprises an N+ high voltage region situated in the epitaxial layer and surrounding a device region in which the semiconductor device is at least partially contained and, further, an N+ buried layer underlying the N+ high voltage region and the entirety of the device region.
摘要:
A power semiconductor device incorporates in its active, or current-carrying, region a main current section and an emulation current section. The active region is surrounded by a common device termination region. This is accomplished through provision of respective separate cathodes for the main and emulation current regions, while the device anode is common to both the main and emulation current sections. The current level in the emulation current section provides an accurate representation of the current level in the main current section since the main and emulation current sections are closely coupled both thermally and electrically and, further, are formed in the same fabrication process. The current level in the main current section can be economically determined with low power circuitry by way of sensing the current level in the emulation current section.
摘要:
Assemblies for HVAC systems and methods of operating HVAC systems are disclosed, including a method of operating an HVAC system having a condenser motor operatively coupled to a fan and a controllable bus voltage for powering the condenser motor. The method includes increasing the controllable bus voltage from a first voltage to a second voltage to increase a speed of the condenser motor.
摘要:
Assemblies for HVAC systems and methods of operating HVAC systems are disclosed, including a method of operating an HVAC system having a compressor assembly and a condenser assembly. The compressor assembly includes a compressor having a compressor motor that is susceptible to backspining and capable of generating electric power when backspinning. The condenser assembly includes a condenser motor operatively coupled to a fan. The condenser assembly is electrically coupled to the compressor assembly. The method includes using the condenser motor as an electric load to dissipate electric power generated by the compressor motor when the compressor motor backspins.
摘要:
Systems and methods for detecting various system conditions in a fluid delivery system (such as an HVAC system) based on a motor parameter are disclosed. Embodiments of the present invention relate to detecting: filter condition, frozen coil condition, register condition, energy efficiency, system failure, or any combination thereof. Embodiments of the present invention relate to detecting fluid delivery system conditions based on motor parameters including system current, system power, system efficiency, motor current, motor power, motor efficiency, and/or a change (or rate of change) in motor parameters. Techniques for responding to a clogged filter and a frozen coil are also disclosed. Also disclosed are techniques for characterizing a fluid delivery system off-site, prior to system installation.