公开(公告)号：US20240088884A1

公开(公告)日：2024-03-14

申请号：US18465338

申请日：2023-09-12

Applicant: ROHM CO., LTD.

Inventor： Katsuaki YAMADA ,  Makoto SADA ,  Toru TAKUMA

IPC: H03K17/081 ,  B60L50/50 ,  H03K17/06 ,  H03K17/687

CPC classification number: H03K17/08104 ,  B60L50/50 ,  H03K17/063 ,  H03K17/6871

Abstract: A semiconductor device includes: a first output transistor and a second output transistor configured to be connected between a first terminal and second terminal; an active clamp circuit configured to be connected to a first control terminal of the first output transistor to limit a terminal-to-terminal voltage appearing between the first and second terminals to a clamp voltage or less; a first variable resistive element provided between a node configured to be fed with a control signal and the first control terminal; a second variable resistive element provided between the node and a second control terminal of the second output transistor; and a turn-off circuit configured to be connected to a connection node between the second variable resistive element and the second control terminal so as to be able to turn the second output transistor off.

公开(公告)号：US20250055275A1

公开(公告)日：2025-02-13

申请号：US18792110

申请日：2024-08-01

Applicant: ROHM CO., LTD.

Inventor： Katsuaki YAMADA ,  Toru TAKUMA ,  Shuntaro TAKAHASHI

IPC: H02H9/02

Abstract: An overcurrent protection circuit that limits a current to be monitored based on a current limit signal includes: a first transistor and a second transistor configured to form an amplifier input stage that receives input of a detection signal according to the current to be monitored; a third transistor configured to generate a current output signal according to a difference between the detection signal and a reference signal, and configured to form an amplifier output stage that inputs the current output signal as a negative feedback to the amplifier input stage; and a current mirror circuit configured to generate the current limit signal by replicating a signal based on the current output signal.

公开(公告)号：US20230378018A1

公开(公告)日：2023-11-23

申请号：US18317632

申请日：2023-05-15

Applicant: ROHM CO., LTD.

Inventor： Hajime OKUDA ,  Yuto NISHIYAMA ,  Toru TAKUMA ,  Katsuaki YAMADA

IPC: H01L23/367 ,  H01L23/00

CPC classification number: H01L23/367 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/06 ,  H01L24/32 ,  H01L24/29 ,  H01L24/45 ,  H01L24/73 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05655 ,  H01L2224/05644 ,  H01L2224/05639 ,  H01L2224/05624 ,  H01L2224/05638 ,  H01L2924/01014 ,  H01L2224/06181 ,  H01L2224/05552 ,  H01L2224/29144 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45139 ,  H01L2224/45655 ,  H01L2224/45664 ,  H01L2224/45644 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48245 ,  H01L2224/48451 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/48101 ,  H01L2224/4901 ,  H01L2224/49111 ,  H01L2224/49112 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2224/73215 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/4945 ,  H01L23/49513

Abstract: A semiconductor device includes: a substrate; a device region provided in the substrate; a terminal covering the device region in a plan view; a plurality of pseudo-bumps densely arranged on the terminal in a state of being opened from a wire; and at least one genuine bump arranged more sparsely than the plurality of the pseudo-bumps on the terminal in a state of being connected to the wire.

公开(公告)号：US20250105834A1

公开(公告)日：2025-03-27

申请号：US18885982

申请日：2024-09-16

Applicant: ROHM CO., LTD.

Inventor： Makoto SADA ,  Katsuaki YAMADA ,  Shuntaro TAKAHASHI ,  Toru TAKUMA ,  Naoki TAKAHASHI

IPC: H03K17/082

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes: a semiconductor substrate; a well, formed in the semiconductor substrate; an output terminal, electrically connected to the semiconductor substrate; a ground terminal, configured to receive a ground voltage; a detection signal generating circuit, configured to generate a negative current detection signal when an output voltage present at the output terminal is detected to be less than the ground voltage; and a control circuit, configured to apply the ground voltage or the output voltage to the well in response to the negative current detection signal. The detection signal generating circuit includes: a comparator, configured to generate the negative current detection signal by comparing an output detection voltage with the ground voltage or the threshold voltage; a bias circuit, configured to switch between applying the output voltage or a bias voltage as the output detection voltage; and a clamp circuit.

公开(公告)号：US20240007103A1

公开(公告)日：2024-01-04

申请号：US18468089

申请日：2023-09-15

Applicant: ROHM CO., LTD.

Inventor： Katsuaki YAMADA ,  Shuntaro TAKAHASHI ,  Muga IMAMURA

IPC: H03K17/687

CPC classification number: H03K17/687

Abstract: A switching device includes: an N-type semiconductor substrate; a power MISFET having the N-type semiconductor substrate as its drain; an input electrode receiving an input signal; a control circuit generating a gate control signal for the power MISFET according to the input signal; and a negative current prevention circuit provided between the input electrode and the control circuit. The negative current prevention circuit includes: a P-channel MISFET connected, with its drain toward the input electrode and its source and back gate toward the control circuit, between the input electrode and the control circuit, with its gate fed with a fixed potential, with the potential at its back gate separated from the potential of the N-type semiconductor substrate; and a diode connected, with its anode toward the input electrode and its cathode toward the control circuit, between the input electrode and the control circuit.

公开(公告)号：US20220352145A1

公开(公告)日：2022-11-03

申请号：US17623992

申请日：2020-07-22

Applicant: Rohm Co., Ltd.

Inventor： Toru Takuma ,  Katsuaki YAMADA

IPC: H01L27/02 ,  H01L29/66 ,  H01L29/866 ,  H03K17/08

Abstract: For example, a semiconductor device includes an output electrode to be connected to an inductive load, a ground electrode to be connected to a ground terminal, first and second transistors connected in parallel between the output and ground electrodes, an active clamp circuit connected to the gate of the first transistor, and a gate control circuit to control the gates of the first and second transistors to keep the first and second transistors on in a first operation state and off in a second operation state. After a transition from the first operation state to the second, before the active clamp circuit operates, the gate control circuit short-circuits between the gate and source of the second transistor.