公开(公告)号：US20050087771A1

公开(公告)日：2005-04-28

申请号：US10949569

申请日：2004-09-24

申请人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

发明人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

IPC分类号： H01L21/331 ,  H01L21/822 ,  H01L21/8222 ,  H01L27/04 ,  H01L27/06 ,  H01L27/082 ,  H01L29/732 ,  H01L29/745

CPC分类号： H01L27/0821 ,  H01L27/0647

摘要： A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to each other; the cathode region of the diode and the collector region of a power NPN transistor are electrically connected to each other. Accordingly, the dividing region in the first island region having a horizontal PNP transistor becomes lower in potential than the dividing regions in the other island regions, so that the inflow of free carriers (electrons) to the horizontal PNP transistor can be prevented.

摘要翻译： 根据本发明的半导体集成电路器件包括在第二岛区中的二极管。 二极管的阳极区域和具有水平PNP晶体管的第一岛区域中的分割区域彼此电连接; 二极管的阴极区域和功率NPN晶体管的集电极区域彼此电连接。 因此，具有水平PNP晶体管的第一岛状区域中的分割区域的电位低于其他岛状区域中的分割区域，从而可以防止自由载流子（电子）向水平PNP晶体管的流入。

公开(公告)号：US07741694B2

公开(公告)日：2010-06-22

申请号：US10950611

申请日：2004-09-27

申请人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

发明人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

IPC分类号： H01L29/00

CPC分类号： H01L21/8224 ,  H01L27/0821 ,  H01L29/7322

摘要： A semiconductor integrated circuit device according to the present invention includes an N-type embedded diffusion region between a substrate and an epitaxial layer in first and second island regions serving as small signal section. The N-type embedded diffusion region connects to N-type diffusion regions having supply potential. The substrate and the epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.

摘要翻译： 根据本发明的半导体集成电路器件包括用作小信号部分的第一和第二岛区中的衬底和外延层之间的N型嵌入扩散区域。 N型嵌入扩散区域连接到具有电源电位的N型扩散区域。 因此，衬底和外延层被用作小信号部分的岛区域中具有电源电位的N型嵌入式扩散区域分隔开。 这种结构防止由于电动机的反电动势进入小信号部分而从电力NPN晶体管产生的自由载流子（电子）的流入，从而防止小信号部分的故障。

公开(公告)号：US20050077571A1

公开(公告)日：2005-04-14

申请号：US10950610

申请日：2004-09-27

申请人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

发明人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

IPC分类号： H01L21/74 ,  H01L21/761 ,  H01L21/8222 ,  H01L21/8224 ,  H01L21/8226 ,  H01L21/8228 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/082 ,  H01L31/113

CPC分类号： H01L27/0826 ,  H01L21/8224 ,  H01L27/0821

摘要： A semiconductor integrated circuit device according to the invention includes an N-type embedded diffusion region between a substrate and a first epitaxial layer in island regions serving as small signal section. The substrate and the first epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.

摘要翻译： 根据本发明的半导体集成电路器件包括在用作小信号部分的岛区中的衬底和第一外延层之间的N型嵌入扩散区域。 因此，衬底和第一外延层被用作小信号部分的岛区域中具有电源电位的N型嵌入扩散区域分隔开。 这种结构防止由于电动机的反电动势进入小信号部分而从电力NPN晶体管产生的自由载流子（电子）的流入，从而防止小信号部分的故障。

公开(公告)号：US07067899B2

公开(公告)日：2006-06-27

申请号：US10950610

申请日：2004-09-27

申请人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

发明人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

IPC分类号： H01L29/00

CPC分类号： H01L27/0826 ,  H01L21/8224 ,  H01L27/0821

摘要： A semiconductor integrated circuit device according to the invention includes an N-type embedded diffusion region between a substrate and a first epitaxial layer in island regions serving as small signal section. The substrate and the first epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.

摘要翻译： 根据本发明的半导体集成电路器件包括在用作小信号部分的岛区中的衬底和第一外延层之间的N型嵌入扩散区域。 因此，衬底和第一外延层被用作小信号部分的岛区域中具有电源电位的N型嵌入扩散区域分隔开。 这种结构防止由于电动机的反电动势进入小信号部分而从电力NPN晶体管产生的自由载流子（电子）的流入，从而防止小信号部分的故障。

公开(公告)号：US07381998B2

公开(公告)日：2008-06-03

申请号：US10949569

申请日：2004-09-24

申请人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

发明人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitake

IPC分类号： H01L29/861

CPC分类号： H01L27/0821 ,  H01L27/0647

摘要： A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to each other; the cathode region of the diode and the collector region of a power NPN transistor are electrically connected to each other. Accordingly, the dividing region in the first island region having a horizontal PNP transistor becomes lower in potential than the dividing regions in the other island regions, so that the inflow of free carriers (electrons) to the horizontal PNP transistor can be prevented.

摘要翻译： 根据本发明的半导体集成电路器件包括在第二岛区中的二极管。 二极管的阳极区域和具有水平PNP晶体管的第一岛区域中的分割区域彼此电连接; 二极管的阴极区域和功率NPN晶体管的集电极区域彼此电连接。 因此，具有水平PNP晶体管的第一岛状区域中的分割区域的电位低于其他岛状区域中的分割区域，从而可以防止自由载流子（电子）向水平PNP晶体管的流入。

公开(公告)号：US20050082632A1

公开(公告)日：2005-04-21

申请号：US10950611

申请日：2004-09-27

申请人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitaka

发明人： Ryo Kanda ,  Shigeaki Okawa ,  Kazuhiro Yoshitaka

IPC分类号： H01L21/74 ,  H01L21/761 ,  H01L21/8222 ,  H01L21/8224 ,  H01L21/8226 ,  H01L21/8228 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/082 ,  H01L29/732 ,  H01L29/423

CPC分类号： H01L21/8224 ,  H01L27/0821 ,  H01L29/7322

摘要： A semiconductor integrated circuit device according to the present invention includes an N-type embedded diffusion region between a substrate and an epitaxial layer in first and second island regions serving as small signal section. The N-type embedded diffusion region connects to N-type diffusion regions having supply potential. The substrate and the epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.

摘要翻译： 根据本发明的半导体集成电路器件包括用作小信号部分的第一和第二岛区中的衬底和外延层之间的N型嵌入扩散区域。 N型嵌入扩散区域连接到具有电源电位的N型扩散区域。 因此，衬底和外延层被用作小信号部分的岛区域中具有电源电位的N型嵌入式扩散区域分隔开。 这种结构防止由于电动机的反电动势进入小信号部分而从电力NPN晶体管产生的自由载流子（电子）的流入，从而防止小信号部分的故障。

公开(公告)号：US06417560B1

公开(公告)日：2002-07-09

申请号：US09679117

申请日：2000-10-04

申请人： Shigeaki Okawa ,  Toshiyuki Ohkoda ,  Yoshiaki Ohbayashi ,  Mamoru Yasuda ,  Shinichi Saeki ,  Shuji Osawa

发明人： Shigeaki Okawa ,  Toshiyuki Ohkoda ,  Yoshiaki Ohbayashi ,  Mamoru Yasuda ,  Shinichi Saeki ,  Shuji Osawa

IPC分类号： H01L23552

CPC分类号： H04R19/005 ,  H04R19/04

摘要： A fixed electrode layer 12 is formed on a semiconductor substrate 11. A vibrating film is formed on the fixed electrode layer through a spacer 14. Since the vibrating film is a light-permeable film, in order to prevent the malfunction of an electronic circuit formed in the semiconductor substrate by incident light, the region where the electronic circuit is to be formed is covered with a shield metal 33.

摘要翻译： 固定电极层12形成在半导体基板11上。通过间隔件14在固定电极层上形成振动膜。由于振动膜是透光膜，为了防止形成电子电路的故障 在通过入射光在半导体衬底中，要形成电子电路的区域被屏蔽金属33覆盖。

公开(公告)号：US06392307B1

公开(公告)日：2002-05-21

申请号：US09534872

申请日：2000-03-24

申请人： Shigeaki Okawa ,  Toshiyuki Ohkoda

发明人： Shigeaki Okawa ,  Toshiyuki Ohkoda

IPC分类号： H01L2348

CPC分类号： H01L24/05 ,  H01L21/761 ,  H01L22/32 ,  H01L23/5222 ,  H01L24/02 ,  H01L27/0635 ,  H01L27/098 ,  H01L2224/05624 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/014 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

摘要： The present invention is a semiconductor device, which is able to provide a desired output voltage of an ECM without signal loss caused by parasitic capacitances. Such a semiconductor device comprises a semiconductor substrate; integrated network elements including an input transistor being integrated on the semiconductor substrate, the input transistor having an input terminal; a first bonding pad connected to the input terminal of the input transistor for testing properties of the input transistor; a second bonding pad connected to one of the integrated network elements for external connection; and a surface area of the first coding pad being smaller than that of the second bonding pad.

摘要翻译： 本发明是一种半导体器件，其能够提供ECM的期望的输出电压，而不会由寄生电容引起信号损失。 这种半导体器件包括半导体衬底; 集成的网络元件包括集成在半导体衬底上的输入晶体管，输入晶体管具有输入端; 连接到输入晶体管的输入端的第一焊盘，用于测试输入晶体管的特性; 连接到所述集成网络元件之一用于外部连接的第二焊盘; 并且所述第一编码焊盘的表面积小于所述第二焊盘的表面积。

公开(公告)号：US08552469B2

公开(公告)日：2013-10-08

申请号：US11862585

申请日：2007-09-27

申请人： Shuichi Kikuchi ,  Shigeaki Okawa ,  Kiyofumi Nakaya ,  Shuji Tanaka

发明人： Shuichi Kikuchi ,  Shigeaki Okawa ,  Kiyofumi Nakaya ,  Shuji Tanaka

IPC分类号： H01L29/66 ,  H01L29/47

CPC分类号： H01L27/0788 ,  H01L27/0255 ,  H01L29/0615 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/47 ,  H01L29/866 ,  H01L29/872

摘要： There is a problem that a reverse off-leak current becomes too large in a Schottky barrier diode. A semiconductor device of the present invention includes P-type first and second anode diffusion layers formed in an N-type epitaxial layer, N-type cathode diffusion layers formed in the epitaxial layer, a P-type third anode diffusion layer formed in the epitaxial layer so as to surround the first and second anode diffusion layers and to extend toward the cathode diffusion layers, and a Schottky barrier metal layer formed on the first and second anode diffusion layers.

摘要翻译： 在肖特基势垒二极管中存在反向漏电流变得过大的问题。 本发明的半导体器件包括形成在N型外延层中的P型第一和第二阳极扩散层，在外延层中形成的N型阴极扩散层，形成在外延层中的P型第三阳极扩散层 以便围绕第一和第二阳极扩散层并朝向阴极扩散层延伸，以及形成在第一和第二阳极扩散层上的肖特基势垒金属层。

公开(公告)号：US07999333B2

公开(公告)日：2011-08-16

申请号：US11391166

申请日：2006-03-27

申请人： Shuichi Kikuch ,  Shigeaki Okawa ,  Kiyofumi Nakaya ,  Toshiyuki Takahashi

发明人： Shuichi Kikuch ,  Shigeaki Okawa ,  Kiyofumi Nakaya ,  Toshiyuki Takahashi

IPC分类号： H01L29/76

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/404 ,  H01L29/41725 ,  H01L29/42368 ,  H01L29/456 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.

摘要翻译： 在现有的半导体装置中，存在如下问题：在施加高电位的布线层横越隔离区域的上表面的区域中，耐电压劣化。 在本发明的半导体器件中，在衬底上沉积外延层，并且在由隔离区域划分的一个区域中形成LDMOSFET。 在与漏电极连接的布线层穿过隔离区域的上表面的区域中，在布线层的下方形成具有接地电位的导电板和浮置状态的另一导电板。 利用这种结构，在布线层下面的隔离区附近减小了电场，从而提高了LDMOSFET的耐受电压。