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公开(公告)号:US12119336B2
公开(公告)日:2024-10-15
申请号:US17883682
申请日:2022-08-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunmog Park , Daehyun Kim , Jinmin Kim , Hei Seung Kim , Hyunsik Park , Sangkil Lee
IPC: H01L25/18 , G11C14/00 , G11C16/04 , H01L23/48 , H01L23/522 , H01L25/00 , H10B41/00 , H10B41/27 , H10B43/27 , G11C13/00 , H10B41/41
CPC classification number: H01L25/18 , G11C14/0018 , G11C16/04 , H01L23/481 , H01L23/5226 , H01L25/50 , H10B41/27 , H10B43/27 , G11C13/0004 , H10B41/41
Abstract: Disclosed are fusion memory devices and methods of fabricating the same. The fusion memory device comprises a first memory device including a first substrate having active and inactive surfaces opposite to each other and a first memory cell circuit on the active surface of the first substrate, a non-memory device including a second substrate having active and inactive surfaces opposite to each other and a non-memory circuit on the active surface of the second substrate, the non-memory device being provided on the first memory device, and a second memory device on the inactive surface of the second substrate and including a second memory cell circuit different from the first memory cell circuit. The non-memory device lies between the first and second memory cell circuits and controls an electrical operation of each of the first and second memory cell circuits.
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公开(公告)号:US20230243082A1
公开(公告)日:2023-08-03
申请号:US18131491
申请日:2023-04-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungwoo LEE , Taedong Goh , Daehyun Kim , Jinbong Lee , Jihoon Jung
IPC: D06F34/08 , H02J7/00 , H02J50/00 , H02J50/10 , D06F34/05 , D06F34/10 , D06F34/28 , D06F34/22 , D06F34/26 , D06F34/18 , G01R19/165 , G01R13/02
CPC classification number: D06F34/08 , H02J7/0047 , H02J7/007 , H02J50/001 , H02J50/10 , D06F34/05 , D06F34/10 , D06F34/28 , D06F34/22 , D06F34/26 , D06F34/18 , G01R19/16566 , G01R13/0281 , D06F2103/32
Abstract: According to various embodiments, a sensor device may comprise: an energy harvester configured to generate electrical energy; an energy storage circuit configured to store the generated electrical energy; a monitoring circuit; a sensor; a communication circuit; and at least one processor, wherein the at least one processor is configured to identify a voltage of the energy storage circuit through the monitoring circuit, operate in a first mode in response to identification that the voltage is equal to or lower than a threshold value, operate in a second mode which consumes more power than the first mode, in response to identification that the voltage exceeds the threshold value, acquire a sensing value through the sensor according to a sensing scheme corresponding to one of the first mode and the second mode, and control the communication circuit to transmit the voltage and the sensing value to another electronic device according to the communication scheme corresponding to one of the first mode and the second mode. Various other embodiments are possible.
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公开(公告)号:US11715666B2
公开(公告)日:2023-08-01
申请号:US17574665
申请日:2022-01-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Hyun Im , Kibum Lee , Daehyun Kim , Ju Hyung We , Sungmi Yoon
IPC: H01L21/762 , H01L21/763 , H01L21/02 , H01L27/146 , H01L29/78 , H01L21/8238 , H01L21/8234 , H10B12/00 , H10B41/27 , H10B43/27
CPC classification number: H01L21/76224 , H01L21/02238 , H01L21/02667 , H01L21/763 , H01L21/8238 , H01L21/823481 , H01L21/823878 , H01L27/1463 , H01L29/785 , H10B12/053 , H10B12/482 , H10B41/27 , H10B43/27 , H01L21/02532 , H01L21/02592
Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a semiconductor substrate that includes a trench defining an active region; a buried dielectric pattern in the trench; a silicon oxide layer between the buried dielectric pattern and an inner wall of the trench; and a polycrystalline silicon layer between the silicon oxide layer and the inner wall of the trench, wherein the polycrystalline silicon layer has a first surface in contact with the semiconductor substrate and a second surface in contact with the silicon oxide layer, and wherein the second surface includes a plurality of silicon grains that are uniformly distributed.
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公开(公告)号:US11232973B2
公开(公告)日:2022-01-25
申请号:US16728348
申请日:2019-12-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Hyun Im , Kibum Lee , Daehyun Kim , Ju Hyung We , Sungmi Yoon
IPC: H01L21/762 , H01L21/763 , H01L21/02 , H01L27/11556 , H01L27/11582 , H01L21/8234 , H01L27/108 , H01L27/146 , H01L29/78 , H01L21/8238
Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a semiconductor substrate that includes a trench defining an active region; a buried dielectric pattern in the trench; a silicon oxide layer between the buried dielectric pattern and an inner wall of the trench; and a polycrystalline silicon layer between the silicon oxide layer and the inner wall of the trench, wherein the polycrystalline silicon layer has a first surface in contact with the semiconductor substrate and a second surface in contact with the silicon oxide layer, and wherein the second surface includes a plurality of silicon grains that are uniformly distributed.
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公开(公告)号:US12144084B2
公开(公告)日:2024-11-12
申请号:US17030706
申请日:2020-09-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Cheonyong Lim , Daehyun Kim , Sungbum Park , Youngho Ryu , Kyungwoo Lee
Abstract: According to various embodiments, an electronic device attachable to and detachable from a side of a cooking vessel that is heated based on a magnetic field generated from an induction cooktop includes: a magnetic harvester circuit configured to generate electric energy based on the magnetic field generated from the induction cooktop based on the electronic device being attached to the side of the cooking vessel; a temperature sensor configured to be driven based on the electric energy and configured to detect a temperature; and a communication circuit configured to transmit the temperature to the induction cooktop.
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公开(公告)号:US20240185942A1
公开(公告)日:2024-06-06
申请号:US18482300
申请日:2023-10-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Myungkyu Lee , Seongmuk Kang , Sunghye Cho , Daehyun Kim , Kyomin Sohn , Kijun Lee
Abstract: A memory device includes a memory cell array and an error correction code (ECC) circuit. The ECC circuit, which is configured to correct an error in a data code read out from the memory cell array, includes: (i) a syndrome calculating unit configured to operate a plurality of syndromes based on the data code and an H-matrix, (ii) an error location detecting unit configured to generate an error vector based on the plurality of syndromes, and (iii) an error correcting unit configured to correct an error within the data code based on the error vector, and output corrected data.
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公开(公告)号:US11869999B2
公开(公告)日:2024-01-09
申请号:US17262484
申请日:2019-07-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Daehyun Kim , Youngjun Park , Jeongman Lee , Kyungwoo Lee , Chongmin Lee
IPC: H01L31/055 , H01L31/054 , H02S10/20 , H02S40/30
CPC classification number: H01L31/055 , H01L31/0543 , H01L31/0547 , H01L31/0549 , H02S10/20 , H02S40/30
Abstract: According to various embodiments, an electronic device comprises: a polymer including a plurality of quantum dots; at least one first solar cell disposed on a lower portion of the polymer; and at least one second solar cell disposed on a side portion of the polymer; and a battery configured to be charged with electrical energy from at least one of the first solar battery or the second solar battery, wherein: the first solar battery, in a first wavelength band, has a conversion efficiency greater than or equal to a threshold value; the second solar battery, in a second wavelength band different from the first wavelength band, has a conversion efficiency greater than or equal to the threshold value; and the wavelength of light that passes through the polymer may be within the first wavelength band, and the wavelength of light that is absorbed by at least some of the plurality of quantum dots and then remitted may be within the second wavelength bandwidth. Other various embodiments are possible.
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公开(公告)号:US11776644B2
公开(公告)日:2023-10-03
申请号:US17591987
申请日:2022-02-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minho Choi , Jaeseong Lim , Kyungryun Kim , Daehyun Kim , Wonil Bae , Hohyun Shin , Sanghoon Jung , Hyongryol Hwang
Abstract: A voltage trimming circuit including: a first resistance circuit having a first resistance value determined by up codes and down codes; a second resistance circuit having a second resistance value determined by the up codes and the down codes; and a comparator to output a voltage detection signal by comparing a voltage level of a reference voltage trimming node to that of a feedback node, wherein the voltage detection signal adjusts the up and down codes, which increase the first resistance value and decrease the second resistance value when the voltage level of the reference voltage trimming node is higher than that of the feedback node, and adjusts the up and down codes, which decrease the first resistance value and increase the second resistance value when the voltage level of the reference voltage trimming node is lower than that of the feedback node.
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公开(公告)号:US11360711B2
公开(公告)日:2022-06-14
申请号:US17092860
申请日:2020-11-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chulseung Lee , Seonghoon Woo , Kyuwook Han , Daehyun Kim
Abstract: A storage device includes a first memory device, a second memory device, and a controller. The first memory device and the second memory device share the same channel to communicate with the controller. Communication between the first memory device and the controller and communication between the second memory device and the controller are mutually exclusive. When the controller receives a read request directed to the second memory device while the controller processes a direct memory access (DMA) operation directed to the first memory device, the controller suspends the DMA operation and transmits a read command associated with the read request to the second memory device.
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公开(公告)号:US10373959B2
公开(公告)日:2019-08-06
申请号:US16050848
申请日:2018-07-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Hyun Im , Daehyun Kim , Hoon Park , Jae-Hong Seo , Chunhyung Chung , Jae-Joong Choi
IPC: H01L29/423 , H01L27/108 , H01L21/283 , H01L21/28 , H01L29/66 , H01L29/49 , H01L21/8234
Abstract: A method of fabricating a semiconductor memory device includes etching a substrate that forms a trench that crosses active regions of the substrate, forming a gate insulating layer on bottom and side surfaces of the trench, forming a first gate electrode on the gate insulating layer that fills a lower portion of the trench, oxidizing a top surface of the first gate electrode where a preliminary barrier layer is formed, nitrifying the preliminary barrier layer where a barrier layer is formed, and forming a second gate electrode on the barrier layer that fills an upper portion of the trench.
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