公开(公告)号：US20220406379A1

公开(公告)日：2022-12-22

申请号：US17351789

申请日：2021-06-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Naoki TAKEGUCHI ,  Masanori TSUTSUMI ,  Seiji SHIMABUKURO ,  Tatsuya HINOUE

IPC: G11C16/04 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11582 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528

Abstract: A vertical repetition of multiple instances of a unit layer stack is formed over a substrate. The unit layer stack includes an insulating layer and a sacrificial material layer. Lateral recesses are formed by removing the sacrificial material layers selective to the insulating layers. Each lateral recess is sequentially fill with at least one conductive fill material and an insulating fill material, and vertically-extending portions of the at least one conductive fill material are removed such that a vertical layer stack including a first-type electrically conductive layer, a seamed insulating layer, and a second-type electrically conductive layer are formed in each lateral recess. Memory opening fill structures including a respective vertical stack of memory elements is formed through the insulating layers and the layer stacks. Access points for providing an etchant for removing the sacrificial material layers may be provided by memory openings, contact via cavities or backside trenches.

公开(公告)号：US20230223267A1

公开(公告)日：2023-07-13

申请号：US17573466

申请日：2022-01-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul SHARANGPANI ,  Fei ZHOU ,  Raghuveer S. MAKALA ,  Yujin TERASAWA ,  Naoki TAKEGUCHI ,  Kensuke YAMAGUCHI

IPC: H01L21/285 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11597 ,  H01L27/24 ,  H01L21/768 ,  C23C16/14 ,  C23C16/455

CPC classification number: H01L21/28568 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11597 ,  H01L27/2481 ,  H01L21/76876 ,  C23C16/14 ,  C23C16/45525 ,  H01L21/76846

Abstract: A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.

公开(公告)号：US20180019256A1

公开(公告)日：2018-01-18

申请号：US15332429

申请日：2016-10-24

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fumitaka AMANO ,  Takashi ARAI ,  Genta MIZUNO ,  Shigehisa INOUE ,  Naoki TAKEGUCHI ,  Takashi HAMAYA

IPC: H01L29/423 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L27/11582 ,  H01L21/28562 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/53266 ,  H01L27/11565 ,  H01L27/1157

Abstract: Void formation in tungsten lines in a three-dimensional memory device can be prevented by providing polycrystalline aluminum oxide liners in portions of lateral recesses that are laterally spaced from backside trenches by a distance grater than a predefined lateral offset distance. Tungsten nucleates on the polycrystalline aluminum oxide liners prior to nucleating on a metallic liner layer. Thus, tungsten layers can be deposited from the center portion of each backside recess, and the growth of tungsten can proceed toward the backside trenches. By forming the tungsten layers without voids, structural integrity of the three-dimensional memory device can be enhanced.

公开(公告)号：US20230223248A1

公开(公告)日：2023-07-13

申请号：US17573452

申请日：2022-01-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fei ZHOU ,  Rahul SHARANGPANI ,  Raghuveer S. MAKALA ,  Yujin TERASAWA ,  Naoki TAKEGUCHI ,  Kensuke YAMAGUCHI ,  Masaaki HIGASHITANI

IPC: H01L21/02 ,  C23C16/458

CPC classification number: H01L21/02175 ,  H01L21/02271 ,  C23C16/4583

Abstract: A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.

公开(公告)号：US20220352200A1

公开(公告)日：2022-11-03

申请号：US17523447

申请日：2021-11-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michiaki SANO ,  Yusuke MUKAE ,  Naoki TAKEGUCHI ,  Yujin TERASAWA ,  Tatsuya HINOUE ,  Ramy Nashed Bassely SAID

IPC: H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.

公开(公告)号：US20230223266A1

公开(公告)日：2023-07-13

申请号：US17573429

申请日：2022-01-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fei ZHOU ,  Rahul SHARANGPANI ,  Raghuveer S. MAKALA ,  Yujin TERASAWA ,  Naoki TAKEGUCHI ,  Kensuke YAMAGUCHI ,  Masaaki HIGASHITANI

IPC: H01L21/285 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11597 ,  H01L27/24 ,  H01L21/768 ,  C23C16/14 ,  C23C16/455

CPC classification number: H01L21/28568 ,  C23C16/14 ,  C23C16/45525 ,  H01L21/76876 ,  H01L27/2481 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11597 ,  H01L21/76846

Abstract: A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.

公开(公告)号：US20220406720A1

公开(公告)日：2022-12-22

申请号：US17351811

申请日：2021-06-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tatsuya HINOUE ,  Naoki TAKEGUCHI ,  Masanori TSUTSUMI ,  Seiji SHIMABUKURO

IPC: H01L23/535 ,  H01L23/522 ,  H01L23/532 ,  H01L27/11556 ,  H01L27/11582 ,  H01L21/768

Abstract: A vertical repetition of multiple instances of a unit layer stack is formed over a substrate. The unit layer stack includes an insulating layer and a sacrificial material layer. Lateral recesses are formed by removing the sacrificial material layers selective to the insulating layers. Each lateral recess is sequentially fill with at least one conductive fill material and an insulating fill material, and vertically-extending portions of the at least one conductive fill material are removed such that a vertical layer stack including a first-type electrically conductive layer, a seamed insulating layer, and a second-type electrically conductive layer are formed in each lateral recess. Memory opening fill structures including a respective vertical stack of memory elements is formed through the insulating layers and the layer stacks. Access points for providing an etchant for removing the sacrificial material layers may be provided by memory openings, contact via cavities or backside trenches.

公开(公告)号：US20220352199A1

公开(公告)日：2022-11-03

申请号：US17523418

申请日：2021-11-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yusuke MUKAE ,  Naoki TAKEGUCHI ,  Yujin TERASAWA ,  Tatsuya HINOUE ,  Ramy Nashed Bassely SAID

IPC: H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.

公开(公告)号：US20240306392A1

公开(公告)日：2024-09-12

申请号：US18662077

申请日：2024-05-13

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ryo MIZUTSU ,  Kento KITAMURA ,  Kentaro YOSHINO ,  Naoki TAKEGUCHI

IPC: H10B43/27 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18 ,  H10B80/00

CPC classification number: H10B43/27 ,  H10B80/00 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80006 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A device structure includes an alternating stack of insulating layers and electrically conductive layers, a dielectric material portion overlying the alternating stack, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, and a coaxial double contact via structure. The coaxial double contact via structure includes an inner layer contact via structure contacting the first-type electrically conductive layer; at least one insulating spacer layer that laterally surrounds the inner layer contact via structure; and an outer layer contact via structure including a tubular conductive portion that laterally surrounds the at least one insulating spacer layer and contacting the second-type electrically conductive layer.

公开(公告)号：US20220406794A1

公开(公告)日：2022-12-22

申请号：US17406493

申请日：2021-08-19

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tatsuya HINOUE ,  Naoki TAKEGUCHI

IPC: H01L27/1157 ,  H01L27/11565 ,  H01L27/11582 ,  G11C16/04

Abstract: A three-dimensional memory device includes a vertical repetition of multiple instances of a unit layer stack, memory openings vertically extending through the vertical repetition, and memory opening fill structures located within the memory openings. Each of the memory opening fill structures contains a respective vertical stack of memory elements. The unit layer stack includes, from bottom to top or from top to bottom, a cavity-free insulating layer that is free of any cavity therein, a first-type electrically conductive layer, a cavity-containing insulating layer including an encapsulated cavity therein, and a second-type electrically conductive layer.