公开(公告)号：US09230915B2

公开(公告)日：2016-01-05

申请号：US13718636

申请日：2012-12-18

Applicant: SK hynix Inc.

Inventor： Jung Tae Jeong ,  Il Hwan Cho

IPC: H01L23/04 ,  H01L23/538 ,  H01L25/00 ,  H01L23/00 ,  H01L23/13 ,  H01L23/48 ,  H01L23/498 ,  H01L23/64 ,  H01L25/065

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/5386 ,  H01L23/64 ,  H01L24/01 ,  H01L24/05 ,  H01L24/72 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/06187 ,  H01L2224/16198 ,  H01L2224/32225 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate and a plurality of semiconductor chips stacked on the substrate. Each of the semiconductor chips has a front surface, a rear surface opposite to the front surface, a sidewall surface connecting the front surface to the rear surface, a vertical through electrode extending from the front surface toward the rear surface with a predetermined depth, and a horizontal through electrode laterally extending from the sidewall surface to be connected to the vertical through electrode. At least one connection member is disposed on the sidewall surfaces of the semiconductor chips to connect the horizontal through electrodes of the semiconductor chips to each other. Related methods are also provided.

Abstract translation: 半导体封装包括衬底和堆叠在衬底上的多个半导体芯片。 每个半导体芯片具有前表面，与前表面相对的后表面，连接前表面和后表面的侧壁表面，以预定深度从前表面向后表面延伸的垂直通孔，以及 从侧壁表面横向延伸以连接到垂直通过电极的水平通过电极。 至少一个连接构件设置在半导体芯片的侧壁表面上，以将半导体芯片的水平通过电极彼此连接。 还提供了相关方法。

公开(公告)号：US20140054772A1

公开(公告)日：2014-02-27

申请号：US13718636

申请日：2012-12-18

Applicant: SK HYNIX INC.

Inventor： Jung Tae Jeong ,  Il Hwan Cho

IPC: H01L23/538 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/5386 ,  H01L23/64 ,  H01L24/01 ,  H01L24/05 ,  H01L24/72 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/06187 ,  H01L2224/16198 ,  H01L2224/32225 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate and a plurality of semiconductor chips stacked on the substrate. Each of the semiconductor chips has a front surface, a rear surface opposite to the front surface, a sidewall surface connecting the front surface to the rear surface, a vertical through electrode extending from the front surface toward the rear surface with a predetermined depth, and a horizontal through electrode laterally extending from the sidewall surface to be connected to the vertical through electrode. At least one connection member is disposed on the sidewall surfaces of the semiconductor chips to connect the horizontal through electrodes of the semiconductor chips to each other. Related methods are also provided.

Abstract translation: 半导体封装包括衬底和堆叠在衬底上的多个半导体芯片。 每个半导体芯片具有前表面，与前表面相对的后表面，连接前表面和后表面的侧壁表面，以预定深度从前表面向后表面延伸的垂直通孔，以及 从侧壁表面横向延伸以连接到垂直通过电极的水平通过电极。 至少一个连接构件设置在半导体芯片的侧壁表面上，以将半导体芯片的水平通过电极彼此连接。 还提供了相关方法。

公开(公告)号：US09397757B2

公开(公告)日：2016-07-19

申请号：US14318529

申请日：2014-06-27

Applicant: SK HYNIX INC.

Inventor： In Chul Hwang ,  Il Hwan Cho ,  Ki Young Kim ,  Kyoung Mo Yang ,  Jae Joon Ahn ,  Chong Ho Cho

IPC: H04B10/80 ,  H04B10/40 ,  G02B6/42 ,  H05K1/18

CPC classification number: H04B10/801 ,  G02B6/42 ,  H01L2224/16145 ,  H01L2224/16225 ,  H04B10/40 ,  H05K1/181 ,  H05K2201/10121 ,  H05K2201/10515 ,  Y02P70/611

Abstract: A semiconductor package includes a package substrate, a first semiconductor substrate and a second semiconductor substrate stacked on the package substrate, and an optical transceiver that generates and receives an optical signal travelling between the package substrate and the second semiconductor substrate using an infrared (IR) ray that passes through the first semiconductor substrate.

Abstract translation: 半导体封装包括封装衬底，堆叠在封装衬底上的第一半导体衬底和第二半导体衬底，以及使用红外线（IR）产生并接收在封装衬底和第二半导体衬底之间行进的光信号的光收发器， 射线穿过第一半导体衬底。

公开(公告)号：US09412690B2

公开(公告)日：2016-08-09

申请号：US14325081

申请日：2014-07-07

Applicant: SK HYNIX INC.

Inventor： Tae Ho Lee ,  Il Hwan Cho ,  In Chul Hwang ,  Ga Hyun No

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/49827 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A package substrate includes a substrate body and a plurality of patterns disposed on the substrate body. The substrate body has a first region including a chip attachment region and a second region adjacent to the first region. The plurality of patterns are disposed on the substrate body in the second region. Each of the plurality of patterns extends in a first direction to have a stripe shape, and the plurality of patterns are spaced apart from each other in a second direction which is substantially perpendicular to the first direction. Related fabrication methods, electronic systems and memory cards are also provided.

Abstract translation: 封装基板包括基板主体和布置在基板主体上的多个图案。 基板主体具有包括芯片附接区域和与第一区域相邻的第二区域的第一区域。 多个图案设置在第二区域中的基板主体上。 多个图案中的每一个在第一方向上延伸以具有条形形状，并且多个图案在基本上垂直于第一方向的第二方向上彼此间隔开。 还提供了相关的制造方法，电子系统和存储卡。