公开(公告)号：US20190221678A1

公开(公告)日：2019-07-18

申请号：US16246945

申请日：2019-01-14

Applicant: STMicroelectronics S.r.l.

Inventor： Flavio Francesco VILLA ,  Marco MORELLI ,  Marco MARCHESI ,  Simone Dario MARIANI ,  Fabrizio Fausto Renzo TOIA

IPC: H01L29/94 ,  H01L49/02 ,  H01L29/66

CPC classification number: H01L29/945 ,  H01L21/02639 ,  H01L21/0265 ,  H01L27/0629 ,  H01L28/60 ,  H01L29/66181

Abstract: A semiconductor body includes a front side and a back side and is configured to support an electronic circuit. A buried region is provided in the semiconductor body at a location between the electronic circuit and the back side. The buried region includes a layer of conductive material and a dielectric layer, where the dielectric layer is arranged between the layer of conductive material and the semiconductor body. A conductive path extends between the buried region and the front side to form a path for electrical access to the layer of conductive material. A capacitor is thus formed with the layer of conductive material providing a capacitor plate and the dielectric layer providing the capacitor dielectric. A further capacitor plate is provided by the semiconductor body, or by a further layer of conductive material in the buried region.

公开(公告)号：US20210143286A1

公开(公告)日：2021-05-13

申请号：US17153599

申请日：2021-01-20

Applicant: STMicroelectronics S.r.l.

Inventor： Flavio Francesco VILLA ,  Marco MORELLI ,  Marco MARCHESI ,  Simone Dario MARIANI ,  Fabrizio Fausto Renzo TOIA

IPC: H01L29/94 ,  H01L29/66 ,  H01L27/06 ,  H01L49/02

Abstract: A semiconductor body includes a front side and a back side and is configured to support an electronic circuit. A buried region is provided in the semiconductor body at a location between the electronic circuit and the back side. The buried region includes a layer of conductive material and a dielectric layer, where the dielectric layer is arranged between the layer of conductive material and the semiconductor body. A conductive path extends between the buried region and the front side to form a path for electrical access to the layer of conductive material. A capacitor is thus formed with the layer of conductive material providing a capacitor plate and the dielectric layer providing the capacitor dielectric. A further capacitor plate is provided by the semiconductor body, or by a further layer of conductive material in the buried region.

公开(公告)号：US20210296578A1

公开(公告)日：2021-09-23

申请号：US17343388

申请日：2021-06-09

Applicant: STMicroelectronics S.r.l.

Inventor： Dario PACI ,  Marco MORELLI ,  Caterina RIVA

IPC: H01L43/12 ,  B82Y25/00 ,  G01R33/09 ,  H01L27/22 ,  G01R33/00 ,  H01L43/08 ,  G01R33/02

Abstract: An integrated magnetoresistive device includes a substrate of semiconductor material that is covered, on a first surface, by an insulating layer. A magnetoresistor of ferromagnetic material extends within the insulating layer and defines a sensitivity plane of the sensor. A concentrator of ferromagnetic material includes at least one arm that extends in a transversal direction to the sensitivity plane and is vertically offset from the magnetoresistor. The concentrator concentrates deflects magnetic flux lines perpendicular to the sensitivity plane so as to generate magnetic-field components directed in a parallel direction to the sensitivity plane.

公开(公告)号：US20190165170A1

公开(公告)日：2019-05-30

申请号：US16264384

申请日：2019-01-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Marco SAMBI ,  Fabrizio Fausto Renzo TOIA ,  Marco MARCHESI ,  Marco MORELLI ,  Riccardo DEPETRO ,  Giuseppe BARILLARO ,  Lucanos Marsilio STRAMBINI

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L29/06 ,  H01L29/36 ,  H01L29/08 ,  H01L29/16 ,  H01L21/308 ,  H01L29/32 ,  H03K17/687 ,  H01L29/417 ,  H01L21/265 ,  H01L29/861 ,  H01L21/762 ,  H01L21/3063

CPC classification number: H01L29/7827 ,  H01L21/02233 ,  H01L21/02255 ,  H01L21/26513 ,  H01L21/3063 ,  H01L21/3081 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0665 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/32 ,  H01L29/36 ,  H01L29/41741 ,  H01L29/66128 ,  H01L29/66666 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/8611 ,  H03K17/687

Abstract: A process of forming integrated electronic device having a semiconductor body includes: forming a first electrode region having a first type of conductivity; forming a second electrode region having a second type of conductivity, which forms a junction with the first electrode region; and forming a nanostructured semiconductor region, which extends in one of the first and second electrode regions.

公开(公告)号：US20170018683A1

公开(公告)日：2017-01-19

申请号：US15087183

申请日：2016-03-31

Applicant: STMicroelectronics S.r.l.

Inventor： Marco MORELLI ,  Fabrizio Fausto Renzo TOIA ,  Giuseppe BARILLARO ,  Marco SAMBI

IPC: H01L33/34 ,  H01L33/00

CPC classification number: H01L33/346 ,  H01L33/0054 ,  H01L33/145

Abstract: A light-emitting device may include a semiconductor body having a first conductivity type, with a front side and a back side. The light-emitting device may also include a porous-silicon region which extends in the semiconductor body at the front side, and a cathode region in direct lateral contact with the porous-silicon region. The light-emitting device may further include a barrier region of electrically insulating material, which extends in direct contact with the cathode region at the bottom side of the cathode region so that, in use, an electric current flows in the semiconductor body through lateral portions of the cathode region.

Abstract translation: 发光装置可以包括具有第一导电类型的半导体本体，其具有前侧和后侧。 发光装置还可以包括在前侧的半导体本体中延伸的多孔硅区域和与多孔硅区域直接侧向接触的阴极区域。 发光装置还可以包括电绝缘材料的阻挡区域，其在阴极区域的底侧处与阴极区域直接接触地延伸，使得在使用中，电流通过侧向部分流过半导体主体 的阴极区域。

公开(公告)号：US20210242323A1

公开(公告)日：2021-08-05

申请号：US17161059

申请日：2021-01-28

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe PATTI ,  Mario Giovanni SCURATI ,  Marco MORELLI

IPC: H01L29/45 ,  H01L29/78 ,  H01L29/10 ,  H01L21/285 ,  H01L29/66

Abstract: A vertical conduction electronic power device includes a body delimited by a first and a second surface and having an epitaxial layer of semiconductor material, and a substrate. The epitaxial layer is delimited by the first surface of the body and the substrate is delimited by the second surface of the body. The epitaxial layer houses at least a first and a second conduction region having a first type of doping and a plurality of insulated-gate regions, which extend within the epitaxial layer. The substrate has at least one silicide region, which extends starting from the second surface of the body towards the epitaxial layer.

公开(公告)号：US20200058540A1

公开(公告)日：2020-02-20

申请号：US16105403

申请日：2018-08-20

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Simone Dario MARIANI ,  Fabrizio Fausto Renzo TOIA ,  Marco SAMBI ,  Davide Giuseppe PATTI ,  Marco MORELLI ,  Giuseppe BARILLARO

IPC: H01L21/762 ,  H01L21/306 ,  H01L21/02 ,  H01L29/06

Abstract: A technique to make silicon oxide regions from porous silicon and related semiconductor structures are disclosed. The porous silicon is made in situ by anodizing P doped silicon regions. Thus, the shape and profile of the oxide regions may be controlled by controlling the shape and profile of the P doped silicon regions.