公开(公告)号：US20190285196A1

公开(公告)日：2019-09-19

申请号：US16295410

申请日：2019-03-07

Applicant: STMicroelectronics S.r.l.

Inventor： Domenico GIUSTI ,  Oriana Rita Antonia DI MARCO ,  Igor VARISCO

IPC: F16K99/00 ,  B81C1/00 ,  B81B3/00 ,  A61M16/20

Abstract: A valve module includes a semiconductor body, cavities in the semiconductor body separated from each other by a distance, a cantilever structure suspended over each cavity to enable at least partial closing of the cavity, and a piezoelectric actuator for each cantilever structure. The piezoelectric actuator is configured for use to cause a positive bending of the respective cantilever structure and so modulate a rate of air flow through the valve module.

公开(公告)号：US20170339494A1

公开(公告)日：2017-11-23

申请号：US15365590

申请日：2016-11-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Matteo PERLETTI ,  Igor VARISCO ,  Luca LAMAGNA ,  Silvia ADORNO ,  Gabriele GATTERE ,  Carlo VALZASINA ,  Sebastiano CONTI

IPC: H04R19/00 ,  B81B3/00 ,  G01H11/06 ,  B81C1/00

CPC classification number: H04R19/005 ,  B81B3/0021 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0136 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2203/053 ,  B81C1/00158 ,  B81C2201/0109 ,  B81C2201/0111 ,  B81C2201/0133 ,  G01H11/06 ,  H04R31/00 ,  H04R2201/003 ,  H04R2201/023

Abstract: A MEMS acoustic transducer provided with: a substrate of semiconductor material, having a back surface and a front surface opposite with respect to a vertical direction; a first cavity formed within the substrate, which extends from the back surface to the front surface; a membrane which is arranged at the upper surface, suspended above the first cavity and anchored along a perimeter thereof to the substrate; and a combfingered electrode arrangement including a number of mobile electrodes coupled to the membrane and a number of fixed electrodes coupled to the substrate and facing respective mobile electrodes for forming a sensing capacitor, wherein a deformation of the membrane as a result of incident acoustic pressure waves causes a capacitive variation of the sensing capacitor. In particular, the combfingered electrode arrangement lies vertically with respect to the membrane and extends parallel thereto.

公开(公告)号：US20230348258A1

公开(公告)日：2023-11-02

申请号：US18302610

申请日：2023-04-18

Applicant: STMicroelectronics S.r.l.

Inventor： Mikel AZPEITIA URQUIA ,  Enri DUQI ,  Silvia NICOLI ,  Roberto CAMPEDELLI ,  Igor VARISCO ,  Lorenzo TENTORI

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/001 ,  B81C1/00158 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/033 ,  B81B2203/0361 ,  B81B2207/11 ,  B81C2201/014 ,  B81C2201/0156 ,  B81C2201/0177 ,  B81C2201/0169

Abstract: MEMS structure, comprising: a semiconductor body; a cavity buried in the semiconductor body; a membrane suspended on the cavity; and at least one antistiction bump completely contained in the cavity with the function of preventing the side of the membrane internal to the cavity from sticking to the opposite side, which delimits the cavity downwardly.

公开(公告)号：US20220411256A1

公开(公告)日：2022-12-29

申请号：US17843483

申请日：2022-06-17

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Paolo FERRARI ,  Flavio Francesco VILLA ,  Enri DUQI ,  Igor VARISCO ,  Filippo D'ERCOLI

IPC: B81B3/00 ,  H01L29/06 ,  H01L27/12 ,  G01L9/00

Abstract: MEMS device formed in a semiconductor body which is monolithic and has a first and a second main surface. A buried cavity extends into the semiconductor body below and at a distance from the first main surface. A diaphragm extends between the buried cavity and the first main surface of the semiconductor body and has a buried face facing the buried cavity. A diaphragm insulating layer extends on the buried face of the diaphragm and a lateral insulating region extends into the semiconductor body along a closed line, between the first main surface and the diaphragm insulating layer, above the buried cavity. The lateral insulating region laterally delimits the diaphragm and forms, with the diaphragm insulating layer, a diaphragm insulating region which delimits the diaphragm and electrically insulates it from the rest of the wafer.

公开(公告)号：US20200079645A1

公开(公告)日：2020-03-12

申请号：US16565803

申请日：2019-09-10

Applicant: STMicroelectronics S.r.l.

Inventor： Sonia COSTANTINI ,  Davide ASSANELLI ,  Aldo Luigi BORTOLOTTI ,  Michele VIMERCATI ,  Igor VARISCO

IPC: B81C1/00 ,  G02B26/08 ,  B81B7/02 ,  H04N9/31 ,  B81B7/00

Abstract: A bottom semiconductor region is formed to include a main sub-region, extending through a bottom dielectric region that coats a semiconductor wafer, and a secondary sub-region which coats the bottom dielectric region and surrounds the main sub-region. First and second top cavities are formed through the wafer, delimiting a fixed body and a patterned structure that includes a central portion which contacts the main sub-region, and deformable portions in contact with the bottom dielectric region. A bottom cavity is formed through the bottom semiconductor region, as far as the bottom dielectric region, the bottom cavity laterally delimiting a stiffening region including the main sub-region and leaving exposed parts of the bottom dielectric region that contact the deformable portions and parts of the bottom dielectric region that delimit the first and second top cavities. The parts left exposed by the bottom cavity are selectively removed.