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    Semiconductor device barrier layer
    2.
    发明授权
    Semiconductor device barrier layer 有权
    半导体器件阻挡层

    公开(公告)号：US06686662B2

    公开(公告)日：2004-02-03

    申请号：US10153231

    申请日：2002-05-21

    申请人： Sailesh Mansinh Merchant ,  Isaiah O. Oladeji ,  Seong Jin Koh

    发明人： Sailesh Mansinh Merchant ,  Isaiah O. Oladeji ,  Seong Jin Koh

    IPC分类号： H01L2352

    CPC分类号： H01L21/76843 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A barrier layer for a semiconductor device metallization component provides a silicon nitride film formed in a component recess and a refractory metal film formed over the silicon nitride film. The device component includes a dielectric material and a recess formed in the dielectric. The surface of the dielectric material within the recess is exposed to nitrogen under controlled parameters. A section of the dielectric material adjacent an interior of the recess is converted to silicon nitride. The refractory metal is then conformed deposited along the recess sidewalls. A seed layer is then deposited over the refractory metal film, and a conductive metal is then deposited within the recess. The device is then polished to remove excess metal outside the recess and planarize the device.

    摘要翻译： 用于半导体器件金属化部件的阻挡层提供形成在氮化硅膜上的部件凹部和难熔金属膜中的氮化硅膜。 器件部件包括介电材料和形成在电介质中的凹部。 凹陷内的电介质材料的表面在受控参数下暴露于氮气。 与凹陷内部相邻的电介质材料的一部分被转换成氮化硅。随后，难熔金属沿凹槽侧壁沉积。 然后将种子层沉积在难熔金属膜上，然后在凹槽内沉积导电金属。 然后将该装置抛光以除去凹部外部的多余金属并使装置平坦化。

    Method for cleaning tungsten from deposition wall chambers
    3.
    发明授权
    Method for cleaning tungsten from deposition wall chambers 失效

    公开(公告)号：US06585830B2

    公开(公告)日：2003-07-01

    申请号：US09727326

    申请日：2000-11-30

    申请人： Nace Layadi ,  Sailesh Mansinh Merchant ,  Simon John Molloy

    发明人： Nace Layadi ,  Sailesh Mansinh Merchant ,  Simon John Molloy

    IPC分类号： B08B500

    CPC分类号： C23C16/4405

    摘要： An unwanted tungsten film deposit on a Chemical Vapor Deposition chamber is cleaned by adding a mixture of at least two cleaning gases into the chamber at a predetermined temperature and pressure and in contact with said chamber walls for a sufficient length of time. The cleaning gases and reacted tungsten species are removed from the chamber by vacuum, and unreacted cleaning gases are removed by purging the chamber with an inert gas. At least one cleaning gas is selected from the group consisting of bromomethane, dibromomethane, bromoform and mixtures thereof. The temperature of the chamber is preferably at least about 300 degrees Celsius. The cleaning gases in the chamber are at a pressure in the range from about 100 to 200 Torr and the chamber is purged at a pressure in the range from about 200 to 500 Torr.

    Method of making a capacitor
    4.
    发明授权
    Method of making a capacitor 有权
    制作电容器的方法

    公开(公告)号：US06358790B1

    公开(公告)日：2002-03-19

    申请号：US09250501

    申请日：1999-02-16

    申请人： Larry Bruce Fritzinger ,  Nace Layadi ,  Sailesh Mansinh Merchant ,  Pradip Kumar Roy

    发明人： Larry Bruce Fritzinger ,  Nace Layadi ,  Sailesh Mansinh Merchant ,  Pradip Kumar Roy

    IPC分类号： H01L218234

    CPC分类号： H01L28/60 ,  H01L21/3212 ,  H01L21/32136 ,  H01L27/1085 ,  H01L28/40 ,  H01L28/75 ,  H01L28/90

    摘要： The present invention provides a method for fabricating a capacitor, comprising the steps of forming a trench in a substrate, forming a layer of a first material selected from the group consisting of titanium and titanium nitride in the trench, filling the trench with a conductive material to form a plug, planarizing the substrate, patterning the substrate to expose the first material, forming an electrode material layer over the substrate, and patterning the electrode material layer, whereby the first material is substantially encapsulated by the electrode material layer.

    摘要翻译： 本发明提供一种制造电容器的方法，包括以下步骤：在衬底中形成沟槽，在沟槽中形成从由钛和氮化钛组成的组中选择的第一材料的层，用导电材料填充沟槽 以形成插头，使衬底平坦化，图案化衬底以露出第一材料，在衬底上形成电极材料层，以及图案化电极材料层，由此第一材料基本上被电极材料层封装。

    Titanium-tantalum barrier layer film and method for forming the same
    5.
    发明授权
    Titanium-tantalum barrier layer film and method for forming the same 有权
    钛 - 钽阻挡层膜及其形成方法

    公开(公告)号：US06331484B1

    公开(公告)日：2001-12-18

    申请号：US09519193

    申请日：2000-03-06

    申请人： Siddhartha Bhowmik ,  Sailesh Mansinh Merchant ,  Minseok Oh ,  Pradip Kumar Roy ,  Sidhartha Sen

    发明人： Siddhartha Bhowmik ,  Sailesh Mansinh Merchant ,  Minseok Oh ,  Pradip Kumar Roy ,  Sidhartha Sen

    IPC分类号： H01L214763

    CPC分类号： H01L21/76864 ,  H01L21/76807 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A titanium-tantalum barrier layer film for use in conjunction with an interconnect film such as copper and a method for forming the same provides a relatively titanium rich/tantalum deficient portion adjacent the interface it forms with a dielectric film and a relatively tantalum rich/titanium deficient portion adjacent the interface it forms with a conductive interconnect film formed over the barrier layer film. The titanium rich/tantalum deficient portion provides good adhesion to the dielectric film and the tantalum rich/titanium deficient portion forms a hetero-epitaxial interface with the interconnect film and suppresses the formation of inter-metallic compounds. A single titanium-tantalum film having a composition gradient from top-to-bottom may be formed using various techniques including PVD, CVD, sputter deposition using a sputtering target of homogeneous composition, and sputter deposition using multiple sputtering targets. A composite titanium-tantalum film consists of two separately formed films.

    摘要翻译： 用于与诸如铜的互连膜一起使用的钛 - 钽阻挡层膜及其形成方法提供了与其形成的界面相邻的富钛/钽缺陷部分，其与介电膜和相对富钽/钛 与其形成的界面相邻的缺陷部分与在阻挡层膜上形成的导电互连膜形成。 富钛/钽缺陷部分对电介质膜提供良好的粘附性，并且富钽/钛缺陷部分与互连膜形成异质外延界面并抑制金属间化合物的形成。 可以使用包括PVD，CVD，使用均匀组合物的溅射靶的溅射沉积以及使用多个溅射靶的溅射沉积的各种技术来形成具有从顶部到底部的组成梯度的单个钛 - 钽膜。 复合钛 - 钽薄膜由两个单独形成的薄膜组成。

    Method of forming capacitor having the lower metal electrode for preventing undesired defects at the surface of the metal plug
    6.
    发明授权
    Method of forming capacitor having the lower metal electrode for preventing undesired defects at the surface of the metal plug 有权
    形成具有下金属电极的电容器的方法，用于防止金属插头表面的不期望的缺陷

    公开(公告)号：US06323044B1

    公开(公告)日：2001-11-27

    申请号：US09408299

    申请日：1999-09-29

    申请人： Edward Belden Harris ,  Sailesh Mansinh Merchant ,  Yifeng Winston Yan

    发明人： Edward Belden Harris ,  Sailesh Mansinh Merchant ,  Yifeng Winston Yan

    IPC分类号： H01L2100

    CPC分类号： H01L28/60 ,  H01L21/28568

    摘要： An integrated circuit capacitor includes a metal plug in a dielectric layer adjacent a substrate. The metal plug has at least one topographical defect in an uppermost surface portion thereof. A lower metal electrode overlies the dielectric layer and the metal plug. The lower metal electrode includes, in stacked relation, a metal layer, a lower metal nitride layer, an aluminum layer, and an upper metal nitride layer. A capacitor dielectric layer overlies the lower metal electrode, and an upper metal electrode overlies the capacitor dielectric layer. An advantage of this structure is that the stack of metal layers of the lower metal electrode, will prevent undesired defects at the surface of the metal plug from adversely effecting device reliability or manufacturing yield.

    摘要翻译： 集成电路电容器包括邻近衬底的电介质层中的金属插塞。 金属插塞在其最上表面部分具有至少一个形貌缺陷。 下部金属电极覆盖在电介质层和金属插头上。 下部金属电极以堆叠关系包括金属层，下部金属氮化物层，铝层和上部金属氮化物层。 电容器电介质层覆盖在下金属电极上，并且上金属电极覆盖在电容器介电层上。 这种结构的优点是，下金属电极的金属层堆叠将防止在金属插塞表面的不期望的缺陷不利地影响器件的可靠性或制造成品率。

    Integrated circuit capacitor including anchored plugs
    9.
    发明授权
    Integrated circuit capacitor including anchored plugs 有权
    集成电路电容器，包括固定插头

    公开(公告)号：US06291848B1

    公开(公告)日：2001-09-18

    申请号：US09364767

    申请日：1999-07-30

    申请人： Sundar Srinivasan Chetlur ,  James Theodore Clemens ,  Sailesh Mansinh Merchant ,  Pradip Kumar Roy ,  Hem M. Vaidya

    发明人： Sundar Srinivasan Chetlur ,  James Theodore Clemens ,  Sailesh Mansinh Merchant ,  Pradip Kumar Roy ,  Hem M. Vaidya

    IPC分类号： H01L27108

    CPC分类号： H01L21/76838 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/60

    摘要： An integrated circuit capacitor includes a substrate, a first dielectric layer adjacent the substrate and having a first trench therein, and a first metal plug extending upwardly into the first trench. An interconnection line overlies the first trench and contacts the first metal plug to define anchoring recesses on opposite sides of the first metal plug. A second dielectric layer is on the interconnection line and has a second trench therein. A second metal plug extends upwardly into the second trench. More particularly, the second metal plug includes a body portion extending upwardly into the second trench, and anchor portions connected to the body portion and engaging the anchoring recesses to anchor the second metal plug to the interconnection line. Because the second metal plug is anchored, a depth of the second trench can be greater without the metal plug becoming loose and separating from the underlying interconnection line.

    摘要翻译： 集成电路电容器包括衬底，与衬底相邻并且在其中具有第一沟槽的第一电介质层和向上延伸到第一沟槽中的第一金属插塞。 互连线覆盖在第一沟槽上并接触第一金属插塞以在第一金属插塞的相对侧上限定锚定凹槽。 第二介电层位于互连线上并且在其中具有第二沟槽。 第二金属插头向上延伸到第二沟槽中。 更具体地，第二金属插头包括向上延伸到第二沟槽中的主体部分，以及连接到主体部分并且与固定凹部接合并将第二金属插头固定到互连线的锚定部分。 由于第二金属插塞被锚固，所以第二沟槽的深度可以更大，而不会使金属插头松动并与下面的互连线分离。