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    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF 审中-公开
    半导体器件及其形成方法

    公开(公告)号：US20150311297A1

    公开(公告)日：2015-10-29

    申请号：US14556870

    申请日：2014-12-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Badro IM ,  Ki-Vin IM ,  Young-kuk KIM ,  Han-jin LIM ,  In-Seak HWANG

    IPC: H01L29/423 ,  H01L29/06 ,  H01L29/10

    CPC classification number: H01L29/4236 ,  H01L21/76224 ,  H01L27/10876 ,  H01L27/10894 ,  H01L29/78

    Abstract: Provided are a semiconductor device and a method of forming thereof. The semiconductor device includes a substrate having an isolating trench defining active areas, gate structures formed in the active area and crossing the isolating trench, a first protection layer formed on the active area of the substrate, and a second protection layer formed on the first protection layer, wherein, in a first isolating area in which the gate structure and the isolating trench cross, the first protection layer is conformally formed on an inner wall and bottom of the isolating trench, and the second protection layer is formed on the first protection layer formed on the bottom of the isolating trench.

    Abstract translation: 提供一种半导体器件及其形成方法。 半导体器件包括具有限定有源区的隔离沟槽的衬底，形成在有源区中并与隔离沟交叉的栅极结构，形成在衬底的有源区上的第一保护层和形成在第一保护层上的第二保护层 其中，在所述栅极结构和所述隔离沟槽交叉的第一隔离区域中，所述第一保护层保形地形成在所述隔离沟槽的内壁和底部上，并且所述第二保护层形成在所述第一保护层上 形成在隔离沟槽的底部。

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20150171159A1

    公开(公告)日：2015-06-18

    申请号：US14459455

    申请日：2014-08-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Han-jin LIM

    IPC: H01L49/02 ,  H01L27/108

    CPC classification number: H01L29/94 ,  H01L27/10805 ,  H01L27/10808 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10823 ,  H01L27/10855 ,  H01L28/91 ,  H01L29/41 ,  H01L29/92 ,  H01L29/945

    Abstract: Provided is a semiconductor device and a method for fabricating the same. The semiconductor device includes an interlayer insulating layer formed on a semiconductor substrate, a metal contact plug penetrating the interlayer insulating layer, a cylindrical lower electrode formed on the metal contact plug and including a first metal and a trench, a supporter formed in the trench and including a second metal that is different from the first metal, a dielectric layer formed on the lower electrode and the supporter and an upper electrode formed on the dielectric layer.

    Abstract translation: 提供一种半导体器件及其制造方法。 半导体器件包括形成在半导体衬底上的层间绝缘层，穿透层间绝缘层的金属接触插塞，形成在金属接触插塞上的圆柱形下电极，并且包括第一金属和沟槽，形成在沟槽中的支撑体 包括不同于第一金属的第二金属，形成在下电极和支撑体上的电介质层和形成在电介质层上的上电极。

    SEMICONDUCTOR DEVICES HAVING METAL SILICIDE LAYERS AND METHODS OF MANUFACTURING SUCH SEMICONDUCTOR DEVICES
    6.
    发明申请
    SEMICONDUCTOR DEVICES HAVING METAL SILICIDE LAYERS AND METHODS OF MANUFACTURING SUCH SEMICONDUCTOR DEVICES 有权
    具有金属硅化物层的半导体器件及其制造这种半导体器件的方法

    公开(公告)号：US20150061136A1

    公开(公告)日：2015-03-05

    申请号：US14267008

    申请日：2014-05-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Won-seok YOO ,  Young-seok KIM ,  Han-jin LIM ,  Jeon-II LEE

    IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768

    CPC classification number: H01L23/5225 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76879 ,  H01L21/76892 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Provided are a semiconductor device and a method of manufacturing the semiconductor device. In order to improve reliability by solving a problem of conductivity that may occur when an air spacer structure that may reduce a capacitor coupling phenomenon between a plurality of conductive lines is formed, there are provided a semiconductor device including: a substrate having an active region; a contact plug connected to the active region; a landing pad spacer formed to contact a top surface of the contact plug; a contact conductive layer formed to contact the top surface of the contact plug and formed in a space defined by the landing pad spacer; a metal silicide layer formed on the contact conductive layer; and a landing pad connected to the contact conductive layer in a state in which the metal silicide layer is disposed between the landing pad and the contact conductive layer, and a method of manufacturing the semiconductor device.

    Abstract translation: 提供半导体器件和制造半导体器件的方法。 为了通过解决当形成能够减少多个导线之间的电容耦合现象的空气间隔结构时可能发生的导电性问题，为了提高可靠性，提供了一种半导体器件，包括：具有有源区的基板; 连接到活动区域的接触插塞; 形成为接触所述接触插塞的顶表面的着陆垫间隔件; 接触导电层，其形成为接触所述接触插塞的顶表面并形成在由所述着陆垫间隔件限定的空间中; 形成在所述接触导电层上的金属硅化物层; 以及在金属硅化物层设置在着陆焊盘和接触导电层之间的状态下连接到接触导电层的着陆焊盘以及制造半导体器件的方法。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150060862A1

    公开(公告)日：2015-03-05

    申请号：US14263119

    申请日：2014-04-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Han-jin LIM ,  Kong-soo LEE ,  Seok-woo NAM ,  Dong-chan KIM ,  Soo-jin HONG

    IPC: H01L27/11 ,  H01L27/092

    CPC classification number: H01L27/092 ,  G11C7/065 ,  G11C11/4091 ,  H01L27/0688 ,  H01L27/1108

    Abstract: A semiconductor device includes a substrate; a first inverter disposed on the substrate and receiving a voltage from any one of a bit line and a complementary bit line; a semiconductor layer disposed on the first inverter; and first and third switch devices disposed on the semiconductor layer and adjusting a threshold voltage of the first inverter to a voltage level of any one of the bit line and the complementary bit line.

    Abstract translation: 半导体器件包括衬底; 第一反相器，设置在所述基板上并接收来自位线和互补位线中的任何一个的电压; 设置在所述第一反相器上的半导体层; 以及设置在半导体层上的第一和第三开关器件，并且将第一反相器的阈值电压调整到位线和互补位线中的任一个的电压电平。

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