公开(公告)号：US20170047309A1

公开(公告)日：2017-02-16

申请号：US15158921

申请日：2016-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Duk BAEK ,  Jong-Bo SHIM ,  Tae-Je CHO

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L23/3171 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/18161

Abstract: A fabricating method of a semiconductor device, in which a first semiconductor chip having a desired first thickness and a semiconductor chip having a desired second thickness are used to fabricate a semiconductor device having a desired third thickness that is greater than the sum of the first and second thicknesses includes providing the first semiconductor chip, which has the first thickness, forming the second semiconductor chip, which is connected to the first semiconductor chip via through silicon vias (TSVs) and has the second thickness, on the first semiconductor chip, and providing a dummy semiconductor chip, which is not electrically connected to the semiconductor chip and has a fourth thickness, on the second semiconductor chip, wherein the fourth thickness is generated based on a difference between about the third thickness and about a sum of the first and second thicknesses.

Abstract translation: 一种半导体器件的制造方法，其中使用具有期望的第一厚度的第一半导体芯片和具有期望的第二厚度的半导体芯片来制造具有期望的第三厚度的半导体器件，所述第三厚度大于第一和第二厚度之和的半导体器件， 第二厚度包括提供具有第一厚度的第一半导体芯片，形成第二半导体芯片，第二半导体芯片经由第一半导体芯片上的硅通孔（TSV）连接到第一半导体芯片并具有第二厚度，并且提供 在所述第二半导体芯片上未与所述半导体芯片电连接并具有第四厚度的虚设半导体芯片，其中所述第四厚度基于所述第三厚度和所述第一和第二厚度之和之间的差大小而产生 厚度

公开(公告)号：US20170047310A1

公开(公告)日：2017-02-16

申请号：US15183778

申请日：2016-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Bo SHIM ,  Seung-Duk BAEK ,  Cha-Jea JO ,  Tae-Je CHO

IPC: H01L25/065 ,  H01L21/78 ,  H01L23/544 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L24/97 ,  H01L25/50 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor package may include a package substrate, a semiconductor chip and a molding member. A protrusion may be formed on a side surface of the package substrate. The semiconductor chip may be arranged on an upper surface of the package substrate. The semiconductor chip may be electrically connected with the package substrate. The molding member may be formed on the upper surface and the side surface of the package substrate, and an upper surface of the protrusion. Thus, the molding member on the protrusion of the package substrate may be configured to cover the side surface of the package substrate so that the side surface of the package substrate may not be exposed.

Abstract translation: 半导体封装可以包括封装衬底，半导体芯片和模制构件。 突起可以形成在封装基板的侧表面上。 半导体芯片可以布置在封装衬底的上表面上。 半导体芯片可以与封装衬底电连接。 成型构件可以形成在封装基板的上表面和侧表面以及突起的上表面上。 因此，封装基板的突起部上的成型部件可以构成为覆盖封装基板的侧面，使得封装基板的侧面不会露出。

公开(公告)号：US20190174087A1

公开(公告)日：2019-06-06

申请号：US16129010

申请日：2018-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hwang KIM ,  Hyo-Eun KIM ,  Jong-Bo SHIM ,  Cha-Jea JO ,  Sang-Uk HAN

IPC: H04N5/369 ,  H04N5/225 ,  G02B5/20 ,  H01L27/146

Abstract: A substrate structure for an image sensor module includes a module substrate including a sensor mounting hole, a reinforcing plate on a lower surface of the module substrate, an image sensor chip on the reinforcing plate within the sensor mounting hole, and a reinforcing pattern in the module substrate. The reinforcing plate covers the sensor mounting hole. An upper surface of the image sensor chip may be exposed by the module substrate. The reinforcing pattern is adjacent to the sensor mounting hole and extends in at least one direction.

公开(公告)号：US20130292822A1

公开(公告)日：2013-11-07

申请号：US13834475

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Yun MYUNG ,  Yong-Hwan KWON ,  Jong-Bo SHIM ,  Moon-Gi CHO

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1146 ,  H01L2224/11472 ,  H01L2224/13025 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: A bump structure includes a first bump and a second bump. The first bump is disposed on a connection pad of a substrate. The first bump includes a lower portion having a first width, a middle portion having a second width smaller than the first width, and an upper portion having a third width greater than the second width. The second bump is disposed on the upper portion of the first bump.

Abstract translation: 凸块结构包括第一凸块和第二凸块。 第一凸块设置在基板的连接焊盘上。 第一凸起包括具有第一宽度的下部，具有小于第一宽度的第二宽度的中间部分，以及具有大于第二宽度的第三宽度的上部。 第二凸块设置在第一凸块的上部。