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公开(公告)号:US09824916B2
公开(公告)日:2017-11-21
申请号:US15250199
申请日:2016-08-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: In-Wook Oh , Jong-Hyun Lee , Sung-Wook Hwang
IPC: H01L21/768 , H01L21/66 , H01L21/033
CPC classification number: H01L21/76811 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/76813 , H01L21/76816 , H01L22/20 , H01L23/522 , H01L23/528
Abstract: A method of forming a mask layout includes forming a layout of a first mask including a lower wiring structure pattern and a dummy lower wiring structure pattern. A layout of a second mask overlapping the first mask and including an upper wiring structure pattern and a dummy upper wiring structure pattern is formed. A layout of a third mask including a first via structure pattern and a first dummy via structure pattern is formed. A layout of a fourth mask including a second via structure pattern and a second dummy via structure pattern is formed. The second via structure pattern may commonly overlap the lower wiring structure pattern and the upper wiring structure pattern, and the second dummy via structure pattern may commonly overlap the dummy lower wiring structure pattern and the dummy upper wiring structure pattern. The fourth mask may overlap the third mask.
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公开(公告)号:US10079172B2
公开(公告)日:2018-09-18
申请号:US15703001
申请日:2017-09-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: In-Wook Oh , Jong-Hyun Lee , Sung-Wook Hwang
IPC: H01L21/768 , H01L21/66 , H01L21/033 , H01L23/522 , H01L23/528
CPC classification number: H01L21/76811 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/76813 , H01L21/76816 , H01L22/20 , H01L23/522 , H01L23/528
Abstract: A method of forming a mask layout includes forming a layout of a first mask including a lower wiring structure pattern and a dummy lower wiring structure pattern. A layout of a second mask overlapping the first mask and including an upper wiring structure pattern and a dummy upper wiring structure pattern is formed. A layout of a third mask including a first via structure pattern and a first dummy via structure pattern is formed. A layout of a fourth mask including a second via structure pattern and a second dummy via structure pattern is formed. The second via structure pattern may commonly overlap the lower wiring structure pattern and the upper wiring structure pattern, and the second dummy via structure pattern may commonly overlap the dummy lower wiring structure pattern and the dummy upper wiring structure pattern. The fourth mask may overlap the third mask.
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公开(公告)号:US11021796B2
公开(公告)日:2021-06-01
申请号:US16212036
申请日:2018-12-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jong-Hyun Lee , Young-Kwon Kim , Woo-Jae Kim , Seung-Min Ryu , Ji-Ho Uh
IPC: H01L21/67 , C23C16/52 , C23C16/455 , C23C16/02 , H01L21/673
Abstract: A gas injector includes first and second gas introduction passages extending in a first direction toward a central axis of a process chamber respectively, a first bypass passage extending from the first gas introduction passage in a second direction that is substantially perpendicular to the first direction, a second bypass passage extending from the second gas introduction passage in a reverse direction to the second direction, a first distribution passage isolated from the first bypass passage in the first direction and extending from an outlet of the first bypass passage in the reverse direction to the second direction, a second distribution passage isolated from the second bypass passage in the first direction and extending from an outlet of the second bypass passage in the second direction, and a plurality of spray holes in an outer surface of the first and second distribution passages and configured to spray the process gas.
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公开(公告)号:US10115540B2
公开(公告)日:2018-10-30
申请号:US15048603
申请日:2016-02-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Pil Kim , Myung-Hyo Bae , Sang-Hun Park , Jong-Hyun Lee , Ju-Ho Yi
Abstract: An electronic device includes a support member, an ornamental member that is assembled to face one face of the support member, and an operating member that is disposed on the support member to be partially exposed to the outside through the ornamental member. The operating member includes a body that is positioned on one face of the support member to be exposed through the ornamental member, and at least one pair of fastening pieces, each of which extends from the body to be fastened to the support member. Other embodiments are also disclosed.
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公开(公告)号:US20180012794A1
公开(公告)日:2018-01-11
申请号:US15703001
申请日:2017-09-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: In-Wook Oh , Jong-Hyun Lee , Sung-Wook Hwang
IPC: H01L21/768 , H01L21/033 , H01L21/66
CPC classification number: H01L21/76811 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/76813 , H01L21/76816 , H01L22/20 , H01L23/522 , H01L23/528
Abstract: A method of forming a mask layout includes forming a layout of a first mask including a lower wiring structure pattern and a dummy lower wiring structure pattern. A layout of a second mask overlapping the first mask and including an upper wiring structure pattern and a dummy upper wiring structure pattern is formed. A layout of a third mask including a first via structure pattern and a first dummy via structure pattern is formed. A layout of a fourth mask including a second via structure pattern and a second dummy via structure pattern is formed. The second via structure pattern may commonly overlap the lower wiring structure pattern and the upper wiring structure pattern, and the second dummy via structure pattern may commonly overlap the dummy lower wiring structure pattern and the dummy upper wiring structure pattern. The fourth mask may overlap the third mask.
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公开(公告)号:US20160284490A1
公开(公告)日:2016-09-29
申请号:US15048603
申请日:2016-02-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Pil Kim , Myung-Hyo Bae , Sang-Hun Park , Jong-Hyun Lee , Ju-Ho Yi
CPC classification number: H01H13/14 , H01H13/10 , H01H2221/03 , H01H2221/05 , H01H2221/056 , H01H2229/022 , H01H2231/022
Abstract: An electronic device includes a support member, an ornamental member that is assembled to face one face of the support member, and an operating member that is disposed on the support member to be partially exposed to the outside through the ornamental member. The operating member includes a body that is positioned on one face of the support member to be exposed through the ornamental member, and at least one pair of fastening pieces, each of which extends from the body to be fastened to the support member. Other embodiments are also disclosed.
Abstract translation: 电子装置包括支撑构件,组装成面对支撑构件的一个面的装饰构件和设置在支撑构件上以通过装饰构件部分地暴露于外部的操作构件。 所述操作构件包括位于所述支撑构件的一个面上以通过所述装饰构件露出的主体,以及至少一对紧固件,每个所述紧固件从所述主体延伸以被固定到所述支撑构件。 还公开了其他实施例。
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公开(公告)号:US12046627B2
公开(公告)日:2024-07-23
申请号:US17658960
申请日:2022-04-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yong-Min Kwon , Geun-Woo Ko , Jung-Wook Lee , Jong-Hyun Lee , Pun-Jae Choi
CPC classification number: H01L27/156 , H01L21/02104 , H01L25/0753 , H01L33/504 , H01L33/56 , H01L33/60 , H01L33/62
Abstract: A semiconductor light-emitting device includes a plurality of light-emitting device structures separated from each other and arranged in a matrix form. A pad region at least partially surrounds the plurality of light-emitting device structures. The pad region is disposed outside of the plurality of light-emitting device structures. A partition structure is disposed on a first surface of the plurality of light-emitting device structures and is further disposed between adjacent light-emitting device structures of the plurality of light-emitting device structures. The partition structure defines a plurality of pixel spaces within the plurality of light-emitting device structures. A fluorescent layer is disposed on the first surface of the plurality of light-emitting device structures and fills each of the plurality of pixel spaces.
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公开(公告)号:US11302743B2
公开(公告)日:2022-04-12
申请号:US16290351
申请日:2019-03-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yong-Min Kwon , Geun-Woo Ko , Jung-Wook Lee , Jong-Hyun Lee , Pun-Jae Choi
Abstract: A semiconductor light-emitting device includes a plurality of light-emitting device structures separated from each other and arranged in a matrix form. A pad region at least partially surrounds the plurality of light-emitting device structures. The pad region is disposed outside of the plurality of light-emitting device structures. A partition structure is disposed on a first surface of the plurality of light-emitting device structures and is further disposed between adjacent light-emitting device structures of the plurality of light-emitting device structures. The partition structure defines a plurality of pixel spaces within the plurality of light-emitting device structures. A fluorescent layer is disposed on the first surface of the plurality of light-emitting device structures and fills each of the plurality of pixel spaces.
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公开(公告)号:US10572616B2
公开(公告)日:2020-02-25
申请号:US15259673
申请日:2016-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung-Wook Hwang , Jong-Hyun Lee , Min-Soo Kang
Abstract: A test pattern includes first line patterns disposed at a first level, having discontinuous regions spaced apart by a first space, having a first width, and extending in a first direction. The test pattern includes a connection line pattern disposed at a second level and extending in the first direction, second line patterns disposed at the second level, branching from the connection line pattern, having a second width, and extending in a second direction perpendicular to the first direction. The test pattern includes via patterns disposed at a third level, having a third width, and formed around an intersection region having the first width of the first line pattern and the second width of the second line pattern. First pads are connected with the first line patterns. A second pad is connected with the connection line pattern.
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公开(公告)号:US10885244B2
公开(公告)日:2021-01-05
申请号:US16739624
申请日:2020-01-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung-Wook Hwang , Jong-Hyun Lee , Min-Soo Kang
Abstract: A test pattern includes first line patterns disposed at a first level, having discontinuous regions spaced apart by a first space, having a first width, and extending in a first direction. The test pattern includes a connection line pattern disposed at a second level and extending in the first direction, second line patterns disposed at the second level, branching from the connection line pattern, having a second width, and extending in a second direction perpendicular to the first direction. The test pattern includes via patterns disposed at a third level, having a third width, and formed around an intersection region having the first width of the first line pattern and the second width of the second line pattern. First pads are connected with the first line patterns. A second pad is connected with the connection line pattern.
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