公开(公告)号：US20240003007A1

公开(公告)日：2024-01-04

申请号：US18138192

申请日：2023-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： PYUNG MOON ,  KIHYUN KIM ,  HYOUNGSUB KIM ,  HOIJOON KIM ,  GEUNYOUNG YEOM ,  KONGSOO LEE ,  HEESOO LEE

IPC: C23C16/455 ,  H01J37/32 ,  H01L29/16 ,  H01L29/51

CPC classification number: C23C16/45536 ,  H01L29/517 ,  H01L29/1606 ,  H01J37/32357

Abstract: A method of manufacturing an integrated circuit device includes alternately stacking sacrificial semiconductor layers and channel layers on a substrate to form a stack structure, forming source regions and drain regions on both sides of the stack structure, forming a gate space between the channel layers by removing the sacrificial semiconductor layers, forming the channel layers to be spaced apart from each other in a perpendicular direction to the substrate, performing a plasma treatment of boron trichloride (BCL3) on the channel layers, forming gate dielectric layers on the channel layers on which the plasma treatment of boron trichloride (BCL3) is performed, and forming gate layers covering the gate dielectric layers in the gate space.

公开(公告)号：US20170162401A1

公开(公告)日：2017-06-08

申请号：US15269036

申请日：2016-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-HO KANG ,  KI-CHUL KIM ,  JAE-HYUN LEE ,  PYUNG MOON ,  HAN-KI LEE ,  UN-KI KIM

IPC: H01L21/324 ,  C23C16/50 ,  H01L21/30 ,  H01L21/687 ,  H01L21/67 ,  H01J37/32 ,  C23C16/458

CPC classification number: H01L21/324 ,  H01J37/32082 ,  H01J37/32633 ,  H01J37/32715 ,  H01J37/32834 ,  H01L21/3003 ,  H01L21/67115 ,  H01L21/6831

Abstract: A plasma processing apparatus includes a susceptor, a chamber housing that accommodates the susceptor and encloses a reaction space, and an annular shaped baffle plate that annularly surrounds the susceptor. The baffle plate includes a first layer that includes a conductive material and a second layer that includes a non-conductive material, and the second layer is closer to the reaction space than the first layer.

公开(公告)号：US20190221424A1

公开(公告)日：2019-07-18

申请号：US16164953

申请日：2018-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyeong Lee ,  SOONWOOK JUNG ,  BONGJIN KUH ,  PYUNG MOON ,  SUKJIN CHUNG

IPC: H01L21/02

CPC classification number: H01L21/02118 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02282

Abstract: Disclosed are method and apparatus for forming a thin layer. The method for forming the thin layer comprises providing a substrate including patterns, forming a bonding layer on the substrate covering an inner surface of a gap between the patterns, forming a preliminary layer on the bonding layer filling the gap; and thermally treating the preliminary layer to form the thin layer. The bonding layer is a self-assembled monomer layer formed using an organosilane monomer. The preliminary layer is formed from a flowable composition comprising polysilane.