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    Methods of Forming Wiring Structures and Methods of Fabricating Semiconductor Devices
    5.
    发明申请
    Methods of Forming Wiring Structures and Methods of Fabricating Semiconductor Devices 有权
    形成接线结构的方法和制造半导体器件的方法

    公开(公告)号：US20150194333A1

    公开(公告)日：2015-07-09

    申请号：US14516774

    申请日：2014-10-17

    申请人： Samsung Electronics Co., Ltd.

    发明人： Woo-Kyung You ,  Sang-Ho Rha ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee

    IPC分类号： H01L21/768

    CPC分类号： H01L21/7682 ,  H01L21/3065 ,  H01L21/764 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76877

    摘要： Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sacrificial layer is transformed into a modified sacrificial layer by a plasma treatment. The modified sacrificial layer is removed by a wet etching process. An insulation layer covering the wiring patterns is formed on the insulating interlayer. The insulation layer defines an air gap therein between neighboring wiring patterns.

    摘要翻译： 提供形成布线结构的方法包括在基板上形成绝缘中间层并在绝缘中间层上形成牺牲层。 牺牲层被部分地去除以限定多个开口。 在开口中形成接线图案。 通过等离子体处理将牺牲层转变成改性的牺牲层。 通过湿蚀刻工艺去除改性牺牲层。 在绝缘中间层上形成覆盖布线图案的绝缘层。 绝缘层在相邻布线图案之间限定了气隙。

    Methods of manufacturing semiconductor devices
    6.
    发明授权
    Methods of manufacturing semiconductor devices 有权

    公开(公告)号：US10777449B2

    公开(公告)日：2020-09-15

    申请号：US16242483

    申请日：2019-01-08

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Sang-Shin Jang ,  Woo-Kyung You ,  Kyu-Hee Han ,  Jong-Min Baek ,  Viet Ha Nguyen ,  Byung-Hee Kim

    IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528

    摘要： A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.

    Methods of forming wiring structures and methods of fabricating semiconductor devices
    7.
    发明授权
    Methods of forming wiring structures and methods of fabricating semiconductor devices 有权
    形成布线结构的方法和制造半导体器件的方法

    公开(公告)号：US09390966B2

    公开(公告)日：2016-07-12

    申请号：US14516774

    申请日：2014-10-17

    申请人： Samsung Electronics Co., Ltd.

    发明人： Woo-Kyung You ,  Sang-Ho Rha ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee

    IPC分类号： H01L21/768 ,  H01L21/3065 ,  H01L21/764

    CPC分类号： H01L21/7682 ,  H01L21/3065 ,  H01L21/764 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76877

    摘要： Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sacrificial layer is transformed into a modified sacrificial layer by a plasma treatment. The modified sacrificial layer is removed by a wet etching process. An insulation layer covering the wiring patterns is formed on the insulating interlayer. The insulation layer defines an air gap therein between neighboring wiring patterns.

    摘要翻译： 提供形成布线结构的方法包括在基板上形成绝缘中间层并在绝缘中间层上形成牺牲层。 牺牲层被部分地去除以限定多个开口。 在开口中形成接线图案。 通过等离子体处理将牺牲层转变成改性的牺牲层。 通过湿蚀刻工艺去除改性牺牲层。 在绝缘中间层上形成覆盖布线图案的绝缘层。 绝缘层在相邻布线图案之间限定了气隙。

    Semiconductor devices and methods of manufacturing the same
    8.
    发明授权
    Semiconductor devices and methods of manufacturing the same 有权

    公开(公告)号：US10199263B2

    公开(公告)日：2019-02-05

    申请号：US15616334

    申请日：2017-06-07

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Sang-Shin Jang ,  Woo-Kyung You ,  Kyu-Hee Han ,  Jong-Min Baek ,  Viet Ha Nguyen ,  Byung-Hee Kim

    IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

    摘要： A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.