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    Memory System and Method for Efficient Padding of Memory Pages
    2.
    发明申请
    Memory System and Method for Efficient Padding of Memory Pages 有权
    存储器系统和存储器页面高效填充的方法

    公开(公告)号：US20160283110A1

    公开(公告)日：2016-09-29

    申请号：US14665893

    申请日：2015-03-23

    Applicant: SanDisk Technologies Inc.

    Inventor： Vimal Jain ,  Abhijeet Manohar ,  Aaron Lee ,  Anne Pao-Ling Koh

    IPC: G06F3/06

    CPC classification number: G06F13/00 ,  G06F3/064 ,  G06F12/14 ,  G06F12/1408 ,  G06F13/1668

    Abstract: In one embodiment, a memory system is provided comprising a memory die and a controller. The memory die comprises a non-volatile memory, a data latch, and an on-chip randomizer. The controller is configured to send a command to the memory die to cause the on-chip randomizer to store random data in the data latch and send data to the memory die to overwrite some, but not all, of the random data in the data latch, wherein the memory die is configured to transfer the data and random data stored in the data latch to the non-volatile memory. Other embodiments are provided.

    Abstract translation: 在一个实施例中，提供了包括存储器管芯和控制器的存储器系统。 存储器管芯包括非易失性存储器，数据锁存器和片上随机器。 控制器被配置为向存储器管芯发送命令以使片上随机器在数据锁存器中存储随机数据，并将数据发送到存储管芯以覆盖数据锁存器中的一些但不是全部的随机数据 ，其中所述存储器管芯被配置为将存储在所述数据锁存器中的数据和随机数据传送到所述非易失性存储器。 提供其他实施例。

    System, method and apparatus for preventing data loss due to memory defects using latches
    3.
    发明授权
    System, method and apparatus for preventing data loss due to memory defects using latches 有权
    用于使用锁存器防止由于存储器缺陷引起的数据丢失的系统，方法和装置

    公开(公告)号：US09372629B2

    公开(公告)日：2016-06-21

    申请号：US14300155

    申请日：2014-06-09

    Applicant: SanDisk Technologies Inc.

    Inventor： Abhijeet Bhalerao ,  Mrinal Kochar ,  Aaron Lee

    IPC: G06F11/00 ,  G06F3/06 ,  G06F11/07

    CPC classification number: G06F11/079 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0685 ,  G06F11/00 ,  G06F11/004 ,  G06F11/0727 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0793 ,  G11C29/025 ,  G11C29/04 ,  G11C29/42 ,  G11C29/76 ,  G11C2029/0409

    Abstract: A system and method for operating a memory system includes receiving a first user data, writing the first user data to a first buffer, writing the first user data from the first buffer to a first selected memory location, writing the first user data from the first buffer into a second buffer when the first user data was successfully written to the first selected memory location. Data is retrieved from the first selected memory location and written into the first buffer. Data in the first buffer can be matched to the user data in the second buffer to confirm a successful storage of the first user data in the memory system. A previously stored user data can be retrieved from a third selected memory location and written into a third buffer when the previously stored user data was stored in the memory system before the first user data.

    Abstract translation: 用于操作存储器系统的系统和方法包括接收第一用户数据，将第一用户数据写入第一缓冲器，将第一用户数据从第一缓冲器写入第一选定存储器位置，将第一用户数据从第一 当第一用户数据被成功写入到第一选择的存储器位置时，缓冲器进入第二缓冲器。 从第一选择的存储单元检索数据并将其写入第一缓冲器。 可以将第一缓冲器中的数据与第二缓冲器中的用户数据相匹配，以确认存储系统中第一用户数据的成功存储。 当先前存储的用户数据在第一用户数据之前存储在存储器系统中时，可以从第三选择的存储器位置检索先前存储的用户数据并将其写入第三缓冲器。

    Selective in-situ retouching of data in nonvolatile memory
    4.
    发明授权
    Selective in-situ retouching of data in nonvolatile memory 有权
    在非易失性存储器中选择性原位修饰数据

    公开(公告)号：US09342401B2

    公开(公告)日：2016-05-17

    申请号：US14028260

    申请日：2013-09-16

    Applicant: SanDisk Technologies, Inc.

    Inventor： Nian Yang ,  Chris Avila ,  Steven T. Sprouse ,  Aaron Lee

    IPC: G06F11/10 ,  G11C16/10 ,  G11C11/56 ,  G11C16/34

    CPC classification number: G06F11/1048 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/3431 ,  G11C16/3459

    Abstract: In a charge-storage memory array, memory cells that are programmed to a particular threshold voltage range and have subsequently lost charge have their threshold voltages restored by selectively adding charge to the memory cells. Adding charge only to memory cells with high threshold voltage ranges may sufficiently increase threshold voltages of other memory cells so that they do not require separate addition of charge.

    Abstract translation: 在电荷存储存储器阵列中，被编程到特定阈值电压范围并随后损耗电荷的存储器单元通过选择性地将电荷加到存储器单元而恢复它们的阈值电压。 仅向具有高阈值电压范围的存储单元加电荷可充分提高其它存储单元的阈值电压，从而不需要单独添加电荷。

    Enhanced post-write read for 3-D memory
    7.
    发明授权
    Enhanced post-write read for 3-D memory 有权
    3-D内存增强后写入读取

    公开(公告)号：US09548105B1

    公开(公告)日：2017-01-17

    申请号：US14927134

    申请日：2015-10-29

    Applicant: SanDisk Technologies Inc.

    Inventor： Aaron Lee ,  Mrinal Kochar ,  Yew Yin Ng

    IPC: G11C16/06 ,  G11C11/419 ,  G11C16/04 ,  G11C16/34

    CPC classification number: G11C11/419 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3454 ,  G11C16/3459 ,  G11C29/025 ,  G11C29/4401 ,  G11C29/76 ,  G11C2029/0409 ,  G11C2029/1202 ,  G11C2029/1204

    Abstract: Apparatus and method for performing a post-write read in a memory device are disclosed. A memory device may include 3-dimensional memory, with the wordlines in a memory block each having multiple strings. Periodically, the memory device may analyze the wordlines for defects by performing a post-write read on a respective wordline and analyzing the read data to determine whether the respective wordline is defective. Rather than reading all of the strings for the respective wordline, less than all of the strings (such as only one of the strings) for the respective wordline are read. In this way, determining whether the respective wordline in 3-dimensional memory may be performed more quickly.

    Abstract translation: 公开了一种用于在存储器件中执行写入后读取的装置和方法。 存储器设备可以包括三维存储器，每个存储器块中的字线具有多个字符串。 定期地，存储器件可以通过在相应的字线上执行写入后读取并分析读取的数据来确定相应的字线是否有缺陷来分析缺陷的字线。 读取相应字线的所有字符串，而不是读取相应字线的全部字符串（例如只有一个字符串）。 以这种方式，确定三维存储器中的相应字线是否可以更快地执行。

    Initialization techniques for multi-level memory cells using multi-pass programming
    8.
    发明授权
    Initialization techniques for multi-level memory cells using multi-pass programming 有权
    使用多遍编程的多级存储器单元的初始化技术

    公开(公告)号：US09460780B2

    公开(公告)日：2016-10-04

    申请号：US14600675

    申请日：2015-01-20

    Applicant: SanDisk Technologies Inc.

    Inventor： Aaron Lee ,  Mrinal Kochar ,  Abhijeet Bhalerao ,  Mikhail Palityka

    IPC: G11C11/34 ,  G11C11/56

    CPC classification number: G11C11/5628 ,  G11C11/5621 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/225 ,  G11C16/3459 ,  G11C2211/5648

    Abstract: Methods are provided for programming multi-level non-volatile memory cells, the multi-level non-volatile memory cells accessible by a plurality of word lines. The methods include using a four-pass programming technique to program a block of the multi-level non-volatile memory cells, detecting a power cycle before completing programming of the block of the multi-level non-volatile memory cells, and upon power-up initialization, resuming programming on the block of the multi-level non-volatile memory cells.

    Abstract translation: 提供了用于编程多级非易失性存储器单元的方法，多级字线可访问多级非易失性存储单元。 所述方法包括使用四遍编程技术对多级非易失性存储器单元的块进行编程，在完成多级非易失性存储单元的块的编程之前检测功率周期， 恢复初始化，在多级非易失性存储单元的块上恢复编程。

    INITIALIZATION TECHNIQUES FOR MULTI-LEVEL MEMORY CELLS USING MULTI-PASS PROGRAMMING
    9.
    发明申请
    INITIALIZATION TECHNIQUES FOR MULTI-LEVEL MEMORY CELLS USING MULTI-PASS PROGRAMMING 有权
    使用多级编程的多级记忆体的初始化技术

    公开(公告)号：US20160211014A1

    公开(公告)日：2016-07-21

    申请号：US14600675

    申请日：2015-01-20

    Applicant: SanDisk Technologies Inc.

    Inventor： Aaron Lee ,  Mrinal Kochar ,  Abhijeet Bhalerao ,  Mikhail Palityka

    IPC: G11C11/56

    CPC classification number: G11C11/5628 ,  G11C11/5621 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/225 ,  G11C16/3459 ,  G11C2211/5648

    Abstract: Methods are provided for programming multi-level non-volatile memory cells, the multi-level non-volatile memory cells accessible by a plurality of word lines. The methods include using a four-pass programming technique to program a block of the multi-level non-volatile memory cells, detecting a power cycle before completing programming of the block of the multi-level non-volatile memory cells, and upon power-up initialization, resuming programming on the block of the multi-level non-volatile memory cells.

    Abstract translation: 提供了用于编程多级非易失性存储器单元的方法，多级字线可访问多级非易失性存储单元。 所述方法包括使用四遍编程技术对多级非易失性存储器单元的块进行编程，在完成多级非易失性存储单元的块的编程之前检测功率周期， 恢复初始化，在多级非易失性存储单元的块上恢复编程。

    SYSTEM, METHOD AND APPARATUS FOR PREVENTING DATA LOSS DUE TO MEMORY DEFECTS USING LATCHES
    10.
    发明申请
    SYSTEM, METHOD AND APPARATUS FOR PREVENTING DATA LOSS DUE TO MEMORY DEFECTS USING LATCHES 有权
    用于使用锁存器防止存储器缺陷的数据丢失的系统，方法和装置

    公开(公告)号：US20150355852A1

    公开(公告)日：2015-12-10

    申请号：US14300155

    申请日：2014-06-09

    Applicant: SanDisk Technologies Inc.

    Inventor： Abhijeet Bhalerao ,  Mrinal Kochar ,  Aaron Lee

    IPC: G06F3/06 ,  G06F11/07

    CPC classification number: G06F11/079 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0685 ,  G06F11/00 ,  G06F11/004 ,  G06F11/0727 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0793 ,  G11C29/025 ,  G11C29/04 ,  G11C29/42 ,  G11C29/76 ,  G11C2029/0409

    Abstract: A system and method for operating a memory system includes receiving a first user data, writing the first user data to a first buffer, writing the first user data from the first buffer to a first selected memory location, writing the first user data from the first buffer into a second buffer when the first user data was successfully written to the first selected memory location. Data is retrieved from the first selected memory location and written into the first buffer. Data in the first buffer can be matched to the user data in the second buffer to confirm a successful storage of the first user data in the memory system. A previously stored user data can be retrieved from a third selected memory location and written into a third buffer when the previously stored user data was stored in the memory system before the first user data.

    Abstract translation: 用于操作存储器系统的系统和方法包括接收第一用户数据，将第一用户数据写入第一缓冲器，将第一用户数据从第一缓冲器写入第一选定存储器位置，将第一用户数据从第一 当第一用户数据被成功写入到第一选择的存储器位置时，缓冲器进入第二缓冲器。 从第一选择的存储单元检索数据并将其写入第一缓冲器。 可以将第一缓冲器中的数据与第二缓冲器中的用户数据相匹配，以确认存储系统中第一用户数据的成功存储。 当先前存储的用户数据在第一用户数据之前存储在存储器系统中时，可以从第三选择的存储器位置检索先前存储的用户数据并将其写入第三缓冲器。

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