公开(公告)号：US08956934B2

公开(公告)日：2015-02-17

申请号：US13706841

申请日：2012-12-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Miyako Nakajima ,  Hidekazu Miyairi ,  Toshiyuki Isa ,  Erika Kato ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi

IPC: H01L29/66 ,  H01L29/04 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/6675 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.

Abstract translation: 目的是提供具有小截止电流，大电流和高场效应迁移率的薄膜晶体管。 层叠氮化硅层和通过氧化氮化硅层形成的氧化硅层作为栅极绝缘层，从栅极绝缘层的氧化硅层的界面生长晶体，形成微晶半导体层; 因此，制造了反交错的薄膜晶体管。 由于晶体从栅极绝缘层生长，所以薄膜晶体管可以具有高结晶度，大电流和高的场效应迁移率。 此外，提供缓冲层以减少电流。

公开(公告)号：US20130095617A1

公开(公告)日：2013-04-18

申请号：US13706841

申请日：2012-12-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Miyako NAKAJIMA ,  Hiddekazu Miyairi ,  Toshiyuki Isa ,  Erika Kato ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi

IPC: H01L29/66

CPC classification number: H01L29/6675 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility, A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.

Abstract translation: 本发明的目的是提供一种具有小截止电流，大电流和高场效应迁移率的薄膜晶体管，通过氧化氮化硅层形成的氮化硅层和氧化硅层作为栅绝缘层 并且晶体从栅极绝缘层的氧化硅层的界面生长以形成微晶半导体层; 因此，制造了反交错的薄膜晶体管。 由于晶体从栅极绝缘层生长，所以薄膜晶体管可以具有高结晶度，大电流和高的场效应迁移率。 此外，提供缓冲层以减少电流。

公开(公告)号：US09450139B2

公开(公告)日：2016-09-20

申请号：US14978463

申请日：2015-12-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro Tanaka ,  Erika Kato

IPC: H01L31/20 ,  H01L21/02 ,  H01L29/04 ,  H01L29/66 ,  H01L31/0304 ,  H01L31/0368 ,  H01L31/0376 ,  H01L31/072 ,  H01L31/0735 ,  H01L31/113 ,  H01L31/18 ,  H01L31/105 ,  H01L29/786

CPC classification number: H01L31/20 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02592 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78648 ,  H01L29/78696 ,  H01L31/0304 ,  H01L31/03685 ,  H01L31/03687 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/03765 ,  H01L31/072 ,  H01L31/0735 ,  H01L31/105 ,  H01L31/1136 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/1816 ,  H01L31/1824 ,  H01L31/1852 ,  H01L31/202 ,  Y02E10/544 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

Abstract: A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

Abstract translation: 提供了一种用于形成含有杂质元素并具有低电阻率的非晶半导体的方法，以及制造具有优异的电特性，高产率的半导体器件的方法。 在利用等离子体CVD法形成含有杂质元素的非晶半导体的方法中，在可以获得根据帕邢定律的最小放电起始电压的压力和电极距离处的电极上施加脉冲调制放电初始电压 由此形成含有杂质元素并具有低电阻率的非晶半导体。