公开(公告)号：US20250048676A1

公开(公告)日：2025-02-06

申请号：US18713288

申请日：2022-11-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Ryota HODO ,  Satoru SAITO ,  Hitoshi KUNITAKE ,  Shunpei YAMAZAKI ,  Masahiro WAKUDA ,  Toshiki HAMADA

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device that can be miniaturized or highly integrated and a manufacturing method thereof are provided. A semiconductor device includes a metal oxide, a first conductor and a second conductor over the metal oxide, a first insulator positioned over the metal oxide and between the first conductor and the second conductor, a second insulator over the first insulator, a third insulator over the second insulator, a third conductor over the third insulator, a fourth insulator positioned between the first conductor and the first insulator, and a fifth insulator positioned between the second conductor and the first insulator. The first insulator is in contact with the top surface and the side surface of the metal oxide, and oxygen is less likely to pass through the first insulator than the second insulator. The first conductor, the second conductor, the fourth insulator, and the fifth insulator contain the same metal element. In a cross-sectional view in a channel length direction, a distance from the first conductor to the first insulator is greater than or equal to a thickness of the first insulator and less than or equal to a distance from the third conductor to the metal oxide.

公开(公告)号：US20160260836A1

公开(公告)日：2016-09-08

申请号：US15058330

申请日：2016-03-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Toshimitsu OBONAI ,  Satoru SAITO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/34 ,  H01L29/04

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/045 ,  H01L29/24 ,  H01L29/34 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

Abstract: A novel oxide semiconductor film. An oxide semiconductor film with a small amount of defects. An oxide semiconductor film in which a peak value of the density of shallow defect states at an interface between the oxide semiconductor film and an insulating film is small. The oxide semiconductor film includes In, M (M is Al, Ga, Y, or Sn), Zn, and a region in which a peak value of a density of shallow defect states is less than 1E13 per square cm per volt.

Abstract translation: 一种新型氧化物半导体膜。 具有少量缺陷的氧化物半导体膜。 在氧化物半导体膜和绝缘膜之间的界面处的浅缺陷状态的密度的峰值小的氧化物半导体膜。 氧化物半导体膜包括In，M（M是Al，Ga，Y或Sn），Zn以及浅缺陷状态的密度的峰值小于1E13 /平方厘米每伏的区域。

公开(公告)号：US20180337289A1

公开(公告)日：2018-11-22

申请号：US16034456

申请日：2018-07-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Masashi TSUBUKU ,  Satoru SAITO ,  Noritaka ISHIHARA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/78696 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78648 ,  H01L29/7869

Abstract: A semiconductor device with improved electrical characteristics is provided. A semiconductor device with improved field effect mobility is provided. A semiconductor device in which the field-effect mobility is not lowered even at high temperatures is provided. A semiconductor device which can be formed at low temperatures is provided. A semiconductor device with improved productivity can be provided. In the semiconductor device, there is a range of a gate voltage where the field-effect mobility increases as the temperature increases within a range of the gate voltage from 0 V to 10 V. For example, such a range of a gate voltage exists at temperatures ranging from a room temperature (25° C.) to 120° C. In the semiconductor device, the off-state current is kept extremely low (lower than or equal to the detection limit of a measurement device) within the above temperature range.

公开(公告)号：US20150162451A1

公开(公告)日：2015-06-11

申请号：US14623086

申请日：2015-02-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Satoru SAITO ,  Terumasa IKEYAMA

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L29/41733

Abstract: An object of one embodiment of the present invention is to provide a highly reliable semiconductor device by giving stable electric characteristics to a transistor including an oxide semiconductor film. The semiconductor device includes a gate electrode layer over a substrate, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a drain electrode layer provided over the oxide semiconductor film to overlap with the gate electrode layer, and a source electrode layer provided to cover an outer edge portion of the oxide semiconductor film. The outer edge portion of the drain electrode layer is positioned on the inner side than the outer edge portion of the gate electrode layer.

Abstract translation: 本发明的一个实施例的目的是通过给包括氧化物半导体膜的晶体管提供稳定的电特性来提供高度可靠的半导体器件。 半导体器件包括：衬底上的栅极电极层，栅极电极层上的栅极绝缘膜，栅极绝缘膜上的氧化物半导体膜;设置在氧化物半导体膜上方的与电极层重叠的漏电极层， 以及源电极层，设置为覆盖氧化物半导体膜的外边缘部分。 漏电极层的外缘部位于比栅电极层的外缘部更内侧。

公开(公告)号：US20210399140A1

公开(公告)日：2021-12-23

申请号：US17279153

申请日：2019-09-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Rai SATO ,  Masami JINTYOU ,  Masayoshi DOBASHI ,  Takashi SHIRAISHI ,  Satoru SAITO ,  Yasutaka NAKAZAWA

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a metal oxide layer, and a conductive layer; the first insulating layer, the metal oxide layer, and the conductive layer are stacked in this order over the semiconductor layer; an end portion of the first insulating layer is located inward from an end portion of the semiconductor layer; an end portion of the metal oxide layer is located inward from the end portion of the first insulating layer; and an end portion of the conductive layer is located inward from the end portion of the metal oxide layer. The second insulating layer is preferably provided to cover the semiconductor layer, the first insulating layer, the metal oxide layer, and the conductive layer. It is preferable that the semiconductor layer include a first region, a pair of second regions, and a pair of third regions; the first region overlap with the first insulating layer and the metal oxide layer; the second regions between which the first region is sandwiched overlap with the first insulating layer and not overlap with the metal oxide layer; the third regions between which the first region and the pair of second regions are sandwiched not overlap with the first insulating layer; and the third regions be in contact with the second insulating layer.

公开(公告)号：US20150372146A1

公开(公告)日：2015-12-24

申请号：US14741961

申请日：2015-06-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki SHISHIDO ,  Satoru SAITO ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Junichi KOEZUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/04 ,  H01L29/24 ,  H01L29/06

CPC classification number: H01L29/7869 ,  H01L29/04 ,  H01L29/0692 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696

Abstract: A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor film, a first gate electrode, a second gate electrode, a first conductive film, and a second conductive film. The first gate electrode is electrically connected to the second gate electrode. The first conductive film and the second conductive film function as a source electrode and a drain electrode. The oxide semiconductor film includes a first region that overlaps with the first conductive film, a second region that overlaps with the second conductive film, and a third region that overlaps with a gate electrode and the third conductive film. The first region includes a first edge that is opposed to the second region. The second region includes a second edge that is opposed to the first region. The length of the first edge is shorter than the length of the second edge.

Abstract translation: 提供具有稳定电特性的半导体器件。 半导体器件包括氧化物半导体膜，第一栅电极，第二栅电极，第一导电膜和第二导电膜。 第一栅电极电连接到第二栅电极。 第一导电膜和第二导电膜用作源电极和漏电极。 氧化物半导体膜包括与第一导电膜重叠的第一区域，与第二导电膜重叠的第二区域和与栅电极和第三导电膜重叠的第三区域。 第一区域包括与第二区域相对的第一边缘。 第二区域包括与第一区域相对的第二边缘。 第一边缘的长度短于第二边缘的长度。

公开(公告)号：US20250040193A1

公开(公告)日：2025-01-30

申请号：US18716572

申请日：2022-11-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hitoshi KUNITAKE ,  Satoru SAITO ,  Masahiro TAKAHASHI ,  Naoki OKUNO ,  Masashi OOTA

IPC: H01L29/786 ,  H01L21/324 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/792 ,  H10B12/00 ,  H10B43/20 ,  H10B80/00

Abstract: A semiconductor device with a high on-state current is provided. A transistor included in the semiconductor device includes a first insulator; a first semiconductor layer over the first insulator; a second semiconductor layer including a channel formation region over the first semiconductor layer; a first conductor and a second conductor over the second semiconductor layer; a second insulator over the second semiconductor layer and between the first conductor and the second conductor; and a third conductor over the second insulator. In a cross-sectional view in a channel width direction of the transistor, the third conductor covers a side surface and a top surface of the second semiconductor layer. The second semiconductor layer has a higher permittivity than the first semiconductor layer. In the cross-sectional view in the channel width direction of the transistor, a length of an interface between the first semiconductor layer and the second semiconductor layer is greater than or equal to 1 nm and less than or equal to 20 nm, and a length from a bottom surface of the second semiconductor layer to a bottom surface of the third conductor in a region not overlapping with the second semiconductor layer is larger than a thickness of the second semiconductor layer.

公开(公告)号：US20170236949A1

公开(公告)日：2017-08-17

申请号：US15429234

申请日：2017-02-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Masashi TSUBUKU ,  Satoru SAITO ,  Noritaka ISHIHARA

IPC: H01L29/786 ,  H01L29/24 ,  H01L27/12 ,  H01L29/04

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78648 ,  H01L29/7869

Abstract: A semiconductor device with improved electrical characteristics is provided. A semiconductor device with improved field effect mobility is provided. A semiconductor device in which the field-effect mobility is not lowered even at high temperatures is provided. A semiconductor device which can be formed at low temperatures is provided. A semiconductor device with improved productivity can be provided. In the semiconductor device, there is a range of a gate voltage where the field-effect mobility increases as the temperature increases within a range of the gate voltage from 0 V to 10 V.For example, such a range of a gate voltage exists at temperatures ranging from a room temperature (25° C.) to 120° C. In the semiconductor device, the off-state current is kept extremely low (lower than or equal to the detection limit of a measurement device) within the above temperature range.

公开(公告)号：US20240379869A1

公开(公告)日：2024-11-14

申请号：US18657118

申请日：2024-05-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu KURATA ,  Ryota HODO ,  Yasuhiro JINBO ,  Tsutomu MURAKAWA ,  Satoru SAITO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L23/528 ,  H01L23/532

Abstract: A semiconductor device includes an oxide semiconductor layer, first to third conductive layers, and first to third insulating layers. The first conductive layer includes a first depressed portion. The first insulating layer over the first conductive layer and the second conductive layer over the first insulating layer include a first opening portion overlapping with the first depressed portion. The oxide semiconductor layer is in contact with a top surface of the second conductive layer, bottom and side surfaces of the first depressed portion, a side surface of the second conductive layer, and a side surface of the first insulating layer. The second insulating layer is positioned inside the oxide semiconductor layer in the first opening portion. The third insulating layer covers top and side surfaces of the oxide semiconductor layer over the first insulating layer, and includes a second opening portion overlapping with the first opening portion.

公开(公告)号：US20240313121A1

公开(公告)日：2024-09-19

申请号：US18575942

申请日：2022-07-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Satoru SAITO ,  Masahiro TAKAHASHI ,  Naoki OKUNO ,  Haruyuki BABA ,  Hitoshi KUNITAKE ,  Shunpei YAMAZAKI

IPC: H01L29/786

CPC classification number: H01L29/7869

Abstract: A semiconductor device with a small variation in transistor electrical characteristics is provided. The semiconductor device includes an oxide; a first conductor, a second conductor, and a first insulator over the oxide; a second insulator over the first conductor and the second conductor; a third insulator over the first insulator; a third conductor over the third insulator; and a fourth insulator over the second insulator and the third conductor. The fourth insulator is in contact with a top surface of the second insulator and a top surface of the third conductor. The first insulator includes regions that are in contact with a top surface of the oxide, a side surface of the first conductor, a side surface of the second conductor, and a side surface of the second insulator. The oxide includes indium, gallium, aluminum, and zinc. Each of the first insulator and the fourth insulator includes aluminum and oxygen. The fourth insulator has an amorphous structure. The oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from the bottom surface of the oxide.