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    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20160293766A1

    公开(公告)日：2016-10-06

    申请号：US15175183

    申请日：2016-06-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Motomu KURATA ,  Shinya SASAGAWA ,  Taiga MURAOKA ,  Hiroaki HONDA ,  Takashi HAMADA

    IPC: H01L29/786 ,  H01L29/417

    CPC classification number: H01L29/7869 ,  H01L21/02334 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78696

    Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.

    Abstract translation: 准备具有绝缘表面的基板; 在基板上形成包括第一氧化物半导体层和第二氧化物半导体层的层叠膜; 在层叠膜的一部分上形成掩模层，然后进行干法蚀刻处理，从而除去保留有掩模层的区域，在其余的侧面形成反应产物 叠片 去除掩模层后，通过湿蚀刻处理去除反应产物; 源极电极和漏电极形成在堆叠膜上; 并且第三氧化物半导体层，栅极绝缘膜和栅极电极按顺序层叠并形成在堆叠膜上，以及源电极和漏电极。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20130140555A1

    公开(公告)日：2013-06-06

    申请号：US13686332

    申请日：2012-11-27

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Motomu KURATA ,  Shinya SASAGAWA ,  Taiga MURAOKA ,  Tetsuhiro TANAKA ,  Junichi KOEZUKA

    IPC: H01L29/786 ,  H01L29/66

    CPC classification number: H01L29/7869 ,  H01L29/66742 ,  H01L29/66969

    Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20140284595A1

    公开(公告)日：2014-09-25

    申请号：US14204365

    申请日：2014-03-11

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shinya SASAGAWA ,  Motomu KURATA ,  Taiga MURAOKA

    IPC: H01L29/786 ,  H01L21/02

    CPC classification number: H01L29/7869 ,  H01L21/02521 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78618 ,  H01L29/78666 ,  H01L29/78675 ,  H01L29/78696

    Abstract: A semiconductor device for miniaturization is provided. The semiconductor device includes a semiconductor layer; a first electrode and a second electrode that are on the semiconductor layer and apart from each other over the semiconductor layer; a gate electrode over the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. The first and second electrodes comprise first conductive layers and second conductive layers. In a region overlapping with the semiconductor layer, the second conductive layers are positioned between the first conductive layers, and side surfaces of the second conductive layers are in contact with side surfaces of the first conductive layers. The second conductive layers have smaller thicknesses than those of the first conductive layers, and the top surface levels of the second conductive layers are lower than those of the first conductive layers.

    Abstract translation: 提供了一种用于小型化的半导体器件。 半导体器件包括半导体层; 在所述半导体层上并且在所述半导体层上彼此分开的第一电极和第二电极; 半导体层上的栅电极; 以及在半导体层和栅电极之间的栅极绝缘层。 第一和第二电极包括第一导电层和第二导电层。 在与半导体层重叠的区域中，第二导电层位于第一导电层之间，第二导电层的侧表面与第一导电层的侧表面接触。 所述第二导电层的厚度小于所述第一导电层的厚度，并且所述第二导电层的顶表面电平低于所述第一导电层的顶表面电平。

    NEGATIVE ELECTRODE FOR NON-AQUEOUS SECONDARY BATTERY, NON-AQUEOUS SECONDARY BATTERY, AND MANUFACTURING METHODS THEREOF
    5.
    发明申请
    NEGATIVE ELECTRODE FOR NON-AQUEOUS SECONDARY BATTERY, NON-AQUEOUS SECONDARY BATTERY, AND MANUFACTURING METHODS THEREOF 有权
    非水性二次电池负极，非水性二次电池及其制造方法

    公开(公告)号：US20130164612A1

    公开(公告)日：2013-06-27

    申请号：US13721093

    申请日：2012-12-20

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Kazuki TANEMURA ,  Toshihiko TAKEUCHI ,  Taiga MURAOKA

    IPC: H01M4/70

    CPC classification number: H01M4/70 ,  B82Y40/00 ,  H01M4/134 ,  H01M4/1395 ,  H01M4/366 ,  H01M4/386 ,  H01M4/661

    Abstract: A non-aqueous secondary battery which has high charge-discharge capacity, can be charged and discharged at high speed, and has little deterioration in battery characteristics due to charge and discharge is provided. A negative electrode includes a current collector and an active material layer. The current collector includes a plurality of protrusion portions extending in a substantially perpendicular direction and a base portion connected to the plurality of protrusion portions. The protrusion portions and the base portion are formed using the same material containing titanium. Top surfaces and side surfaces of the protrusion portions and a top surface of the base portion are covered with the active material layer. The active material layer includes a plurality of whiskers. The active material layer may be covered with graphene.

    Abstract translation: 具有高充放电能力的非水二次电池可以高速充电和放电，并且由于提供充放电而几乎没有电池特性的劣化。 负极包括集电体和活性物质层。 集电体包括沿基本上垂直的方向延伸的多个突出部分和连接到多个突出部分的基部。 使用与钛相同的材料形成突出部和基部。 突出部分的顶表面和侧表面以及基部的顶表面被活性材料层覆盖。 活性物质层包括多个晶须。 活性物质层可以用石墨烯覆盖。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20140291674A1

    公开(公告)日：2014-10-02

    申请号：US14227459

    申请日：2014-03-27

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Motomu KURATA ,  Shinya SASAGAWA ,  Taiga MURAOKA ,  Hiroaki HONDA ,  Takashi HAMADA

    IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

    CPC classification number: H01L29/7869 ,  H01L21/02334 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78696

    Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.

    Abstract translation: 准备具有绝缘表面的基板; 在基板上形成包括第一氧化物半导体层和第二氧化物半导体层的层叠膜; 在层叠膜的一部分上形成掩模层，然后进行干法蚀刻处理，从而除去保留有掩模层的区域，在其余的侧面形成反应产物 叠片 去除掩模层后，通过湿蚀刻处理去除反应产物; 源极电极和漏电极形成在堆叠膜上; 并且第三氧化物半导体层，栅极绝缘膜和栅极电极按顺序层叠并形成在堆叠膜上，以及源电极和漏电极。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    8.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20140273343A1

    公开(公告)日：2014-09-18

    申请号：US14287494

    申请日：2014-05-27

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunichi ITO ,  Miyuki HOSOBA ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Taiga MURAOKA

    IPC: H01L29/66

    CPC classification number: H01L29/66969 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/7869

    Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.

    Abstract translation: 目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。 在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜 光透过该掩模以具有多个强度。 在蚀刻步骤中，通过使用蚀刻气体的干蚀刻进行第一蚀刻步骤，并且通过使用蚀刻剂的湿蚀刻进行第二蚀刻步骤。

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