摘要:
A vertical memory device may include a plurality of word lines spaced apart in a first direction, each extending in a second direction perpendicular to the first direction and having a first width in a third direction perpendicular to the first and second directions, a dummy word line over an uppermost word line, including an opening and having a portion thereof with the first width in the third direction, a first string selection line (SSL) and a second string selection line (SSL) over the dummy word line, the first and second SSLs being at substantially the same level along the first direction, each of the first and second SSLs having a second width less than the first width in the third direction, and a plurality of vertical channel structures, each through the word lines, the dummy word line, and one of the first and second SSLs.
摘要:
According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.
摘要:
A vertical memory device includes a substrate, a channel, gate lines and a connecting portion. A plurality of the channels extend in a first direction which is vertical to a top surface of a substrate. A plurality of the gate lines are stacked in the first direction to be spaced apart from each other and extend in a second, lengthwise direction, each gate line intersecting a set of channels and surrounding outer sidewalls of each channel of the set of channels. The gate lines forms a stepped structure which includes a plurality of vertical levels. A connecting portion connects a group of gate lines of the plurality of gate lines located at the same vertical level, the connecting portion diverging from the second direction in which the gate lines of the group of gate lines extend.
摘要:
A wiring structure includes a first plug extending through a first insulating interlayer on a substrate, a first wiring extending through a second insulating interlayer on the first insulating interlayer and the first wiring is electrically connected to the first plug, a diffusion barrier layer pattern on the first wiring and on the second insulating interlayer, a portion of the second insulating interlayer being free of being covered by the diffusion barrier layer pattern, a second plug extending through the diffusion barrier layer pattern, the second plug is in contact with the first wiring, and a second wiring electrically connected to the second plug.
摘要:
Disclosed is an insulating varnish composition including an organo silica sol containing a silica covered with a dispersant in a solvent containing N-methyl-2-pyrrolidone (NMP) as a main component and a polyamidimide resin dispersed in a solvent containing NMP as a main component. An insulated layer formed from the insulating varnish composition containing inorganic insulating particles of silica uniformly dispersed therein may have excellent corona discharge resistance, thereby preventing the insulation breakdown.
摘要:
According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.
摘要:
A method is provided for controlling a device by a portable terminal in a device automation system. Upon detecting an execution request for a single remote control mode for remotely controlling a device, the portable terminal sends a single remote control mode execution request message for requesting to execute the single remote control mode, to the device. Upon receiving from the device a single remote control mode execution response message being responsive to the single remote control mode execution request message, the portable terminal switches an operation mode thereof to the single remote control mode. Upon receiving from the device a device data message including device data output by the device, the portable terminal outputs the device data. Upon detecting a remote control command to remotely control the device while outputting the device data, the portable terminal sends a remote control message including the remote control command to the device.
摘要:
An electronic circuit apparatus for compensating for a process variation of a resistor in an electronic circuit is provided. The electronic circuit includes a detecting part for generating a tune voltage corresponding to a process variation value of the at least one resistor, and a compensating part for compensating for a process variation of the at least one resistor using the tune voltage.