Process for formation for hetero junction structured film utilizing V
grooves
    1.
    发明授权
    Process for formation for hetero junction structured film utilizing V grooves 失效
    利用V沟槽形成异质结结构薄膜的工艺

    公开(公告)号:US5500389A

    公开(公告)日:1996-03-19

    申请号:US342031

    申请日:1994-11-17

    摘要: A process for formation of a hetero junction structured film utilizing V grooves is disclosed. A monocrystalline film 1 is etched into V grooves, and thereupon, a hetero film 2 having misfits is grown, so that dislocations would be intensively distributed within the V grooves. Then, an oxide layer 3 is formed thereupon, and then, the portions of the oxide layer 3 and the hereto film 2 corresponding to the V grooves are removed by carrying out an etching. Then, the residue oxide layer is removed, thereby forming a non-stress non-dislocation hetero junction structure. Further, the following steps can be added. That is, on the above structure, a thin oxide layer 3 is deposited by carrying out a thermal oxidation or a chemical deposition, and then, a polycrystalline silicon film 4 is deposited. Then the surface irregularities are smoothened by carrying out a selective grinding. Or the following steps may be added. That is, the V groove portions of the hetero film 2 and the monocrystalline film 1 are filled with a monocrystalline film, and the residue oxide layer 3 is removed. Thus a hetero junction film can be grown in which the stress effect is minimized, and the dislocation concentration is made to be extremely low.

    摘要翻译: 公开了一种利用V沟形成异质结结构薄膜的方法。 将单晶膜1蚀刻成V槽,随后生长出错位的异质膜2,使位错集中分布在V槽内。 然后,在其上形成氧化物层3,然后通过进行蚀刻来去除与V槽对应的氧化物层3和本膜2的部分。 然后,除去残留氧化物层,从而形成非应力非位错异质结结构。 此外,可以添加以下步骤。 也就是说,在上述结构中,通过进行热氧化或化学沉积来沉积薄的氧化物层3,然后沉积多晶硅膜4。 然后通过进行选择性研磨使表面凹凸平滑。 或者可以添加以下步骤。 也就是说,异质膜2和单晶膜1的V槽部分填充有单晶膜,并且去除残余氧化物层3。 因此,可以生长应力效应最小化的异质结膜,并使位错浓度极低。

    Surface plasma wave coupled detectors
    3.
    发明授权
    Surface plasma wave coupled detectors 有权
    表面等离子体波耦合检测器

    公开(公告)号:US09466739B1

    公开(公告)日:2016-10-11

    申请号:US14213691

    申请日:2014-03-14

    摘要: The present disclosure relates to an electromagnetic energy detector. The detector can include a substrate having a first refractive index; a metal layer; an absorber layer having a second refractive index and disposed between the substrate and the metal layer; a coupling structure to convert incident radiation to a surface plasma wave; additional conducting layers to provide for electrical contact to the electromagnetic energy detector, each conducting layer characterized by a conductivity and a refractive index; and a surface plasma wave (“SPW”) mode-confining layer having a third refractive index that is higher than the second refractive index disposed between the substrate and the metal layer.

    摘要翻译: 本公开涉及电磁能量检测器。 检测器可以包括具有第一折射率的基板; 金属层; 具有第二折射率并设置在所述基板和所述金属层之间的吸收体层; 将入射辐射转换成表面等离子体波的耦合结构; 附加导电层以提供与电磁能量检测器的电接触,每个导电层的特征在于导电性和折射率; 以及具有比设置在基板和金属层之间的第二折射率高的第三折射率的表面等离子体波(“SPW”)模式限制层。

    Cubic phase, nitrogen-based compound semiconductor films epitaxially grown on a grooved Si <001> substrate
    5.
    发明授权
    Cubic phase, nitrogen-based compound semiconductor films epitaxially grown on a grooved Si <001> substrate 有权
    在带槽的Si <001>衬底上外延生长的立方相,氮基化合物半导体膜

    公开(公告)号:US08313967B1

    公开(公告)日:2012-11-20

    申请号:US12691463

    申请日:2010-01-21

    IPC分类号: H01L21/20

    摘要: A method of epitaxial growth of cubic phase, nitrogen-based compound semiconductor thin films on a semiconductor substrate, for example a substrate, which is periodically patterned with grooves oriented parallel to the crystal direction and terminated in sidewalls, for example sidewalls. The method can provide an epitaxial growth which is able to supply high-quality, cubic phase epitaxial films on a silicon substrate. Controlling nucleation on sidewall facets, for example , fabricated in every groove and blocking the growth of the initial hexagonal phase at the outer region of an epitaxial silicon layer with barrier materials prepared at both sides of each groove allows growth of cubic-phase thin film in each groove and either be extended to macro-scale islands or coalesced with films grown from adjacent grooves to form a continuous film. This can result in a wide-area, cubic phase nitrogen-based compound semiconductor film on a substrate.

    摘要翻译: 在半导体衬底(例如<001>衬底)上外延生长立方相氮基化合物半导体薄膜的方法,该衬底周期性地图案化具有平行于晶体方向并终止于侧壁的沟槽的沟槽,用于 例如<111>侧壁。 该方法可以提供能够在<001>硅衬底上提供高质量立方相外延膜的外延生长。 控制在每个凹槽上制造的侧壁面上的成核,例如<111>,并且阻挡在外延硅层的外部区域处的初始六边形相的生长,其中在每个凹槽的两侧制备的阻挡材料允许生长立方相 每个凹槽中的薄膜,并且被延伸到大尺度岛或与从相邻凹槽生长的薄膜聚结以形成连续薄膜。 这可以导致在<001>衬底上的广泛的立方相的氮基化合物半导体膜。

    PLASMONIC DETECTORS
    6.
    发明申请
    PLASMONIC DETECTORS 有权
    等离子体检测器

    公开(公告)号:US20120205541A1

    公开(公告)日:2012-08-16

    申请号:US13502987

    申请日:2010-10-21

    摘要: A plasmonic detector is described which can resonantly enhance the performance of infrared detectors. More specifically, the disclosure is directed to enhancing the quantum efficiency of semiconductor infrared detectors by increasing coupling to the incident radiation field as a result of resonant coupling to surface plasma waves supported by the metal/semiconductor interface, without impacting the dark current of the device, resulting in an improved detectivity over the surface plasma wave spectral bandwidth.

    摘要翻译: 描述了可以共振地增强红外检测器的性能的等离子体激元检测器。 更具体地,本公开涉及通过增加与入射辐射场的耦合来提高半导体红外检测器的量子效率,这是由于与由金属/半导体界面支撑的表面等离子体波的谐振耦合而不影响器件的暗电流 ,导致比表面等离子体波谱带宽更好的检测性。

    Fabrication of optical-quality facets vertical to a (001) orientation substrate by selective epitaxial growth
    10.
    发明授权
    Fabrication of optical-quality facets vertical to a (001) orientation substrate by selective epitaxial growth 有权
    通过选择性外延生长制造垂直于(001)取向衬底的光学质量面

    公开(公告)号:US08841756B2

    公开(公告)日:2014-09-23

    申请号:US12200139

    申请日:2008-08-28

    摘要: Methods for forming {110} type facets on a (001) oriented substrate of Group III-V compounds and Group IV semiconductors using selective epitaxial growth is provided. The methods include forming a dielectric film on a (100) substrate. The dielectric film can then be patterned to expose a portion of the substrate and to form a substrate-dielectric film boundary substantially parallel to a direction. A {110} type sidewall facet can then be formed by epitaxially growing a semiconductor layer on the exposed portion of the substrate and the dielectric film.

    摘要翻译: 提供了使用选择性外延生长在III-V族化合物和IV族半导体的(001)取向衬底上形成{110}型面的方法。 所述方法包括在(100)衬底上形成电介质膜。 然后可以对电介质膜进行构图以暴露衬底的一部分并且形成基本上平行于<110>方向的衬底 - 电介质膜边界。 然后可以通过在衬底和电介质膜的暴露部分上外延生长半导体层来形成{110}型侧壁面。