USB charger circuit
    1.
    发明授权
    USB charger circuit 有权
    USB充电器电路

    公开(公告)号:US08072186B2

    公开(公告)日:2011-12-06

    申请号:US12058728

    申请日:2008-03-30

    IPC分类号: H02J7/04

    摘要: A USB charger circuit includes at least a converter, a control circuitry, a first resistor, a second resistor, an error amplifier, a sense resistor and a diode. The converter has a transistor. The control circuitry is coupled to the transistor. The control circuitry is used for producing a drive signal to the transistor. The first resistor is connected between the output node of the converter and a first node. The second resistor is connected between the first node and a second node. The error amplifier is coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage. The sense resistor is connected between the second node and ground. The diode is connected between the output node of the converter and a first node.

    摘要翻译: USB充电器电路至少包括转换器,控制电路,第一电阻器,第二电阻器,误差放大器,检测电阻器和二极管。 该转换器有一个晶体管。 控制电路耦合到晶体管。 控制电路用于产生到晶体管的驱动信号。 第一个电阻连接在转换器的输出节点和第一个节点之间。 第二电阻器连接在第一节点和第二节点之间。 误差放大器被耦合以接收由第一电阻器和第二电阻器分压的电压以与参考电压进行比较。 感测电阻连接在第二节点和地之间。 二极管连接在转换器的输出节点和第一个节点之间。

    USB Charger Circuit
    2.
    发明申请
    USB Charger Circuit 有权
    USB充电器电路

    公开(公告)号:US20090072796A1

    公开(公告)日:2009-03-19

    申请号:US12058728

    申请日:2008-03-30

    IPC分类号: H02J7/06

    摘要: A USB charger circuit includes at least a converter, a control circuitry, a first resistor, a second resistor, an error amplifier, a sense resistor and a diode. The converter has a transistor. The control circuitry is coupled to the transistor. The control circuitry is used for producing a drive signal to the transistor. The first resistor is connected between the output node of the converter and a first node. The second resistor is connected between the first node and a second node. The error amplifier is coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage. The sense resistor is connected between the second node and ground. The diode is connected between the output node of the converter and a first node.

    摘要翻译: USB充电器电路至少包括转换器,控制电路,第一电阻器,第二电阻器,误差放大器,检测电阻器和二极管。 该转换器有一个晶体管。 控制电路耦合到晶体管。 控制电路用于产生到晶体管的驱动信号。 第一个电阻连接在转换器的输出节点和第一个节点之间。 第二电阻器连接在第一节点和第二节点之间。 误差放大器被耦合以接收由第一电阻器和第二电阻器分压的电压以与参考电压进行比较。 感测电阻连接在第二节点和地之间。 二极管连接在转换器的输出节点和第一个节点之间。

    Benzenoid compounds of antrodia cinnamomea, preparation and analysis method thereof
    3.
    发明授权
    Benzenoid compounds of antrodia cinnamomea, preparation and analysis method thereof 有权
    桂皮酚的苯并噻吩类化合物,其制备及分析方法

    公开(公告)号:US08716499B2

    公开(公告)日:2014-05-06

    申请号:US13346300

    申请日:2012-01-09

    IPC分类号: C07D317/48

    摘要: Disclosed are a method for preparing an n-hexane extract of the fruiting body of Antrodia cinnamomea (AC), wherein the fruiting body of AC is sequentially extracted with the ethanol solution and the n-hexane solution to obtain the n-hexane extract containing at least one benzenoid compound. The amounts of 4,7-dimethoxy-5-(3-methylbut-3-en-1-ynyl)-6-methyl-1,3-benzodioxole, 4,7-dimethoxy-5-methyl-1,3-benzodioxole, antrocamphine A and the combination thereof in the at least one benzenoid compound are determined using chromatography, NMR and HPLC. In addition, the present invention is applicable on detecting the amounts of benzenoid compounds in the AC healthcare food/drug or the fruiting body of AC, and thus owns the industrial values.

    摘要翻译: 本发明提供了一种用于制备仙人掌(AC)子实体的正己烷提取物的方法,其中AC的子实体依次用乙醇溶液和正己烷溶液萃取,得到含有 至少一种苯类化合物。 4,7-二甲氧基-5-(3-甲基丁-3-烯-1-炔基)-6-甲基-1,3-苯并间二氧杂环戊烯,4,7-二甲氧基-5-甲基-1,3-苯并间二氧杂环戊烯 ,抗阿奇霉素A及其在至少一种苯类化合物中的组合使用色谱法,NMR和HPLC测定。 此外,本发明可应用于检测AC保健食品/药物或AC的子实体中的苯类化合物的量,因此具有工业价值。

    Schmitt trigger input stage
    5.
    发明授权
    Schmitt trigger input stage 失效
    施密特触发输入级

    公开(公告)号:US6091264A

    公开(公告)日:2000-07-18

    申请号:US85613

    申请日:1998-05-27

    CPC分类号: H03K19/0013

    摘要: A circuit and a method are disclosed for a Schmitt trigger stage which converts transistor-transistor logic (TTL) into metal oxide semiconductor (MOS) logic signal levels using all MOS devices. The circuit reduces the standby current of the n-channel transistor of the input section of the Schmitt trigger stage by adding a MOS diode to the bottom the input section. When higher than normal supply voltages are used, the standby current of the p-channel transistor of the input section can be reduced by adding a MOS diode to the top of the input section. In addition, a small MOS transistor, connected across the output Schmitt trigger inverter, eliminates leakage currents in that inverter.

    摘要翻译: 公开了用于施密特触发级的电路和方法,其使用所有MOS器件将晶体管晶体管逻辑(TTL)转换为金属氧化物半导体(MOS)逻辑信号电平。 该电路通过向输入部分的底部添加MOS二极管来降低施密特触发级的输入部分的n沟道晶体管的待机电流。 当使用高于正常电源电压时,可以通过向输入部分的顶部添加MOS二极管来减小输入部分的p沟道晶体管的待机电流。 另外,一个连接在输出施密特触发器上的小型MOS晶体管消除了该逆变器的漏电流。

    Power supply voltage switch circuit
    7.
    发明申请
    Power supply voltage switch circuit 有权
    电源电压开关电路

    公开(公告)号:US20050146230A1

    公开(公告)日:2005-07-07

    申请号:US10707647

    申请日:2003-12-30

    IPC分类号: H02B1/24 H02J1/08

    摘要: A power supply voltage switch circuit for selecting a power supply voltage of an integrated circuit according to a first control signal. The power supply voltage switch circuit contains a high voltage selecting module for generating an output voltage according to the higher of a first and a second voltages; a level shifting module electrically connected to the high voltage selecting module to receive the output voltage as power supply, for performing level shifting to a first control signal according to the output voltage; and a selecting switch module electrically connected to the level shifting module for selectively outputting the first or the second voltage as the power supply voltage of the integrated circuit according to the level-shifted first control signal.

    摘要翻译: 一种用于根据第一控制信号选择集成电路的电源电压的电源电压开关电路。 电源电压开关电路包括用于根据第一和第二电压中较高者产生输出电压的高电压选择模块; 电平移动模块,电连接到所述高电压选择模块以接收所述输出电压作为电源,用于根据所述输出电压进行到第一控制信号的电平转换; 以及选择开关模块,电连接到电平移位模块,用于根据电平移位的第一控制信号选择性地输出第一或第二电压作为集成电路的电源电压。

    Method using a word line driver for driving a word line
    8.
    发明授权
    Method using a word line driver for driving a word line 失效
    使用字线驱动程序来驱动字线的方法

    公开(公告)号:US06580658B1

    公开(公告)日:2003-06-17

    申请号:US10065661

    申请日:2002-11-07

    IPC分类号: G11C800

    CPC分类号: G11C8/08 G11C16/08

    摘要: A word line driver includes an address decoder having a first circuit and a second circuit for selecting the word line, and a control end disposed between the first circuit and the second circuit. In addition, the word line driver has a level shift circuit for shifting a voltage level of the word line, and the level shift circuit has an input end connected to the second circuit of the address decoder. A method of driving a word line includes shifting a voltage level of the control end while turning on the second circuit so as to shift a voltage level of the input end of the level shift circuit, and shifting a voltage level of at least one of the first and second power supplies and using the second circuit to isolate the voltage level of the control end from the voltage level of the word line.

    摘要翻译: 字线驱动器包括具有第一电路的地址解码器和用于选择字线的第二电路,以及设置在第一电路和第二电路之间的控制端。 此外,字线驱动器具有用于移位字线的电压电平的电平移位电路,并且电平移位电路具有连接到地址解码器的第二电路的输入端。 一种驱动字线的方法包括:在接通第二电路的同时移动控制端的电压电平,以便移位电平移位电路的输入端的电压电平,并移位至少一个 第一和第二电源,并使用第二电路将控制端的电压电平与字线的电压电平隔离开。

    Parallel read and verify for floating gate memory device
    9.
    发明授权
    Parallel read and verify for floating gate memory device 有权
    并行读取和验证浮动栅极存储器件

    公开(公告)号:US6147910A

    公开(公告)日:2000-11-14

    申请号:US386766

    申请日:1999-08-31

    摘要: A page mode flash memory or floating gate memory device, including a page buffer based upon low current bit latches, and additional capabilities for parallel read and parallel program verify operations. The present device includes bit latch circuitry and/or method steps that facilitate such parallel operations and avoid data conflicts. Circuitry for separate read signals can serve to isolate the operations. Additionally, circuitry tied to the data verification signal can also be used. A diode type device can be used to isolate signal conditions that might indicate the cell does not need to be programmed. Bit-by-bit precharging of the bit lines can also be employed in order to save precharging power. Additionally, the large capacitance of the dataline might be used to delay discharging a particular dataline, and thereby allow a latch enabling signal to go high, thus eliminating the need for further isolation circuitry, or the like.

    摘要翻译: 页面模式闪速存储器或浮动栅极存储器件,包括基于低电流位锁存器的页面缓冲器,以及用于并行读取和并行程序验证操作的附加功能。 本装置包括有利于这种并行操作并避免数据冲突的位锁存电路和/或方法步骤。 用于单独读取信号的电路可用于隔离操作。 此外,还可以使用与数据验证信号相关的电路。 可以使用二极管类型的器件来隔离可能指示电池不需要编程的信号条件。 为了节省预充电功率,也可以采用位线的逐位预充电。 此外,数据线的大电容可能用于延迟放电特定数据线,从而允许锁存使能信号变高,从而不需要进一步的隔离电路等。

    MONITOR AND METHOD OF DISPLAYING PIXELS ON DISPLAYING DEVICE
    10.
    发明申请
    MONITOR AND METHOD OF DISPLAYING PIXELS ON DISPLAYING DEVICE 审中-公开
    在显示装置上显示像素的监视器和方法

    公开(公告)号:US20120262503A1

    公开(公告)日:2012-10-18

    申请号:US13530120

    申请日:2012-06-22

    IPC分类号: G09G5/10

    摘要: A monitor and a method of displaying a plurality of pixels on a displaying device are disclosed. The monitor includes a displaying device including a controlling module and a displaying panel electrically connected to the controlling module. The controlling module displaying the plurality of pixels on the displaying device partially according to a brightness adjustment relation and partially according to an original gray level-brightness relation. Therefore, the invention can adjust input images only in partial gray levels, not all gray levels, by a user's request, for example making dark portions become bright or making bright portions become dark, especially for games.

    摘要翻译: 公开了一种在显示装置上显示多个像素的监视器和方法。 监视器包括显示装置,其包括控制模块和与控制模块电连接的显示面板。 所述控制模块根据亮度调整关系部分地显示所述显示装置上的所述多个像素,并且部分地根据原始灰度级亮度关系显示。 因此,本发明可以根据用户的要求仅在部分灰度级别而不是所有灰度级调整输入图像,例如使暗部变亮或使亮部变暗,特别是对于游戏。