公开(公告)号：US07259058B2

公开(公告)日：2007-08-21

申请号：US10020314

申请日：2001-12-18

申请人： Yasuhiro Shimamoto ,  Masahiko Hiratani ,  Yuichi Matsui ,  Satoshi Yamamoto ,  Toshihide Nabatame ,  Toshio Ando ,  Hiroshi Sakuma ,  Shinpei Iijima

发明人： Yasuhiro Shimamoto ,  Masahiko Hiratani ,  Yuichi Matsui ,  Satoshi Yamamoto ,  Toshihide Nabatame ,  Toshio Ando ,  Hiroshi Sakuma ,  Shinpei Iijima

IPC分类号： H01L21/8242

CPC分类号： H01L28/60 ,  C23C16/18 ,  H01L21/28556 ,  H01L21/28568 ,  H01L28/55 ,  H01L28/91

摘要： A ruthenium electrode with a low amount of oxygen contamination and high thermal stability is formed by a chemical vapor deposition method. In the chemical vapor deposition method using an organoruthenium compound as a precursor, the introduction of an oxidation gas is limited to when the precursor is supplying, and the reaction is allowed to occur at a low oxygen partial pressure. Consequently, it is possible to form a ruthenium film with a low amount of oxygen contamination. Further, after formation of the ruthenium film, annealing at not less than the formation temperature is performed, thereby forming a ruthenium film with high thermal stability.

摘要翻译： 通过化学气相沉积法形成氧气污染少，热稳定性高的钌电极。 在使用有机钌化合物作为前体的化学气相沉积方法中，氧化气体的引入限于当前体供应时，并且允许反应在低氧分压下发生。 因此，可以形成氧含量低的钌膜。 此外，在形成钌膜之后，进行不低于形成温度的退火，由此形成热稳定性高的钌膜。

公开(公告)号：US20060234510A1

公开(公告)日：2006-10-19

申请号：US11402061

申请日：2006-04-12

申请人： Shinpei Iijima

发明人： Shinpei Iijima

IPC分类号： H01L21/4763 ,  H01L21/311 ,  H01L21/302

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10894

摘要： According to an aspect of the present invention, there is provided a semiconductor memory device. The semiconductor memory device is provided with an insulator and a capacitor. The capacitor is provided with a lower electrode provided with an inner portion and an outer portion, a dielectric portion on the lower electrode, and an upper electrode on the dielectric portion. The inner portion is provided with a lower part and an upper part upwardly extending from the lower part. The insulator laterally holds the lower part. The outer portion is arranged on the insulator and is electrically connected with the upper part.

摘要翻译： 根据本发明的一个方面，提供一种半导体存储器件。 半导体存储器件设置有绝缘体和电容器。 电容器设置有设置有内部部分和外部部分的下部电极，下部电极上的电介质部分和电介质部分上的上部电极。 内部具有从下部向上延伸的下部和上部。 绝缘体横向保持下部。 外部部分布置在绝缘体上并与上部电连接。

公开(公告)号：US06653676B2

公开(公告)日：2003-11-25

申请号：US09918228

申请日：2001-07-30

申请人： Robert Tsu ,  Isamu Asano ,  Shinpei Iijima ,  William R. McKee

发明人： Robert Tsu ,  Isamu Asano ,  Shinpei Iijima ,  William R. McKee

IPC分类号： H01L27108

CPC分类号： H01L28/75 ,  H01L21/28518 ,  H01L21/76897 ,  H01L28/55 ,  H01L28/90

摘要： The present invention discloses a novel integrated circuit capacitor and a method of forming such a capacitor. The capacitor formation begins with a base electrode 18 adjacent an insulating region 26. This base electrode 18 can comprise either polysilicon or a metal. A layer 28 of a first material, such as a siliciding metal, is formed over the base electrode 18 as well as the adjacent insulating region. A self-aligned capacitor electrode 12 can then be formed by reacting the first material 28 with the base electrode 18 and removing unreacted portions of the first material 28 from the insulating region 26. The capacitor is then completed by forming a dielectric layer 16 over the self-aligned capacitor electrode 12 and a second capacitor electrode 14 over the dielectric layer 16.

公开(公告)号：US06423593B1

公开(公告)日：2002-07-23

申请号：US09943516

申请日：2001-08-31

申请人： Satoshi Yamamoto ,  Shinpei Iijima

发明人： Satoshi Yamamoto ,  Shinpei Iijima

IPC分类号： H01L218242

CPC分类号： H01L21/76897 ,  C23C16/40 ,  H01L21/76816 ,  H01L21/76831 ,  H01L27/10814 ,  H01L28/55 ,  H01L28/60 ,  H01L28/91

摘要： There is provided a technique for forming an Ru film on the bottom of a deep hole with a considerable film thickness for the lower electrode of an information storage capacity element in order to improve the yield of manufacturing DRAMs. The Ru film is formed on the side wall and the bottom of a deep hole as material for preparing the lower electrode of an information storage capacity element to be produced there under the condition of a gasification flow rate ratio of the raw materials ((Ru(C2H5C5H4)2/O2) is not less than 10%. Then, the ratio of the film thickness of the Ru film on the bottom “b” of the hole to the largest film thickness “a” of the Ru film in the hole is not less than 50%.

摘要翻译： 为了提高DRAM的制造成本，提供了用于在信息存储电容元件的下部电极的深孔底部形成Ru膜的技术。 Ru膜形成在深孔的侧壁和底部作为用于制备在原料的气化流量比（（Ru（ C2H5C5H4）2 / O2）不小于10％，然后孔中底部的Ru膜厚度与孔中的Ru膜的最大膜厚“a”的比率为 不低于50％。

公开(公告)号：US6103566A

公开(公告)日：2000-08-15

申请号：US760867

申请日：1996-12-09

申请人： Tsuyoshi Tamaru ,  Shinpei Iijima ,  Natsuki Yokoyama ,  Masayuki Nakata

发明人： Tsuyoshi Tamaru ,  Shinpei Iijima ,  Natsuki Yokoyama ,  Masayuki Nakata

IPC分类号： C23C16/18 ,  C23C16/34 ,  H01L21/02 ,  H01L21/285 ,  H01L21/8242

CPC分类号： H01L27/10894 ,  C23C16/18 ,  C23C16/34 ,  H01L21/28568 ,  H01L27/10852 ,  H01L27/10888 ,  H01L28/75 ,  H01L28/91

摘要： A dynamic random access memory or the like, in which in order to prevent the breakdown voltage deterioration of a capacitive element when a TiN film of an electrode material is deposited by the CVD method over a tantalum film constituting the capacitor insulating film of the capacitive element, a passivation film is formed in advance over the surface of the tantalum oxide film to prevent the tantalum oxide film from contacting a nitrogen-containing reducing gas, when the TiN film is deposited over the tantalum oxide film by the CVD method using a titanium-containing source gas and the nitrogen-containing reducing gas.

摘要翻译： 动态随机存取存储器等，其中为了防止在通过CVD方法将电极材料的TiN膜沉积在构成电容元件的电容绝缘膜的钽膜上时电容元件的击穿电压劣化 在氧化钽膜的表面上预先形成钝化膜，以防止氧化钽膜与含氮还原气体接触，当TiN膜通过CVD法在氧化钽膜上沉积时，使用钛 - 含有源气体和含氮还原气体。

公开(公告)号：US5091761A

公开(公告)日：1992-02-25

申请号：US384821

申请日：1989-07-25

申请人： Atsushi Hiraiwa ,  Shinichiro Kimura ,  Toshiyuki Mine ,  Takashi Kobayashi ,  Tokuo Kure ,  Shinpei Iijima ,  Jiro Yugami

发明人： Atsushi Hiraiwa ,  Shinichiro Kimura ,  Toshiyuki Mine ,  Takashi Kobayashi ,  Tokuo Kure ,  Shinpei Iijima ,  Jiro Yugami

IPC分类号： H01L27/108

CPC分类号： H01L27/10808

摘要： Disclosed is a semiconductor device including a charge storage capacitor having a storage electrode which is electrically connected to a switching transistor through a contact hole provided in an insulator and which has a greater film thickness than the radius of the contact hole, at least a part of the storage electrode being disposed above a data line. It is possible to reduce the memory cell area while preventing lowering in the capacitance, and thus realize high density and high integration of semiconductor devices.

摘要翻译： 公开了一种半导体器件，包括具有存储电极的电荷存储电容器，该存储电极通过设置在绝缘体中的接触孔与开关晶体管电连接并且具有比接触孔的半径更大的膜厚度，至少部分 所述存储电极设置在数据线的上方。 可以在防止电容降低的同时减小存储单元面积，从而实现半导体器件的高密度和高集成度。

公开(公告)号：US07667257B2

公开(公告)日：2010-02-23

申请号：US11585203

申请日：2006-10-24

申请人： Shinpei Iijima

发明人： Shinpei Iijima

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L28/91

摘要： Method for solving the problem caused when forming a crown-structure capacitor in a trench which is formed in an insulating film, and having difficulty in electrical by connecting a first upper electrode formed on the inside wall of the trench and a second upper electrode which is to be a plate because of the intervention of dielectric between the first and second upper electrodes. The conducting state of the first upper electrode and the plate upper electrode is ensured by utilizing a tantalum oxide film formed on a titanium nitride film, which is brought to a completely conducting state when heat treated. A crown structure is formed without removing the insulating film, in which a trench has been formed, by wet etching, whereby a stacked trench capacitor, which has double the capacity is provided while eliminating the collapse of the lower electrode or pair bit defect.

摘要翻译： 用于解决在形成在绝缘膜中的沟槽中形成冠状结构电容器时引起的问题的方法，并且难以通过连接形成在沟槽的内壁上的第一上电极和第二上电极 由于第一和第二上部电极之间的电介质的介入而成为板。 通过利用形成在氮化钛膜上的氧化钽膜来确保第一上电极和板上电极的导电状态，当经过热处理时，其形成为完全导通状态。 通过湿式蚀刻，形成不形成沟槽的绝缘膜而形成凸面结构，由此提供具有双倍容量的叠层沟槽式电容器，同时消除了下部电极或对位缺陷的崩溃。

公开(公告)号：US06927439B2

公开(公告)日：2005-08-09

申请号：US10923002

申请日：2004-08-23

申请人： Hiroshi Moriya ,  Tomio Iwasaki ,  Hiroyuki Ohta ,  Shinpei Iijima ,  Isamu Asano ,  Yuzuru Ohji ,  Yoshitaka Nakamura

发明人： Hiroshi Moriya ,  Tomio Iwasaki ,  Hiroyuki Ohta ,  Shinpei Iijima ,  Isamu Asano ,  Yuzuru Ohji ,  Yoshitaka Nakamura

IPC分类号： H01L27/10 ,  H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/76

CPC分类号： H01L28/60 ,  H01L27/10814 ,  H01L28/55

摘要： A semiconductor device equipped with information storage capacitor comprising a first capacitor electrode, an oxide film, a second capacitor electrode and insulating films containing silicon as a main constituting element, wherein at least one of first and second capacitor electrodes contains as a main constituting element at least one element selected from rhodium, ruthenium, iridium, osmium and platinum, and as an adding element at least one element selected from palladium, nickel, cobalt and titanium, is excellent in adhesiveness between the capacitor electrodes and the insulating films.

摘要翻译： 一种配备有信息存储电容器的半导体器件，包括第一电容器电极，氧化物膜，第二电容器电极和以硅为主要构成元素的绝缘膜，其中，第一和第二电容器电极中的至少一个包含作为主要构成元素 选自铑，钌，铱，锇和铂中的至少一种元素，并且作为添加元素，选自钯，镍，钴和钛中的至少一种元素，电容器电极和绝缘膜之间的粘附性优异。

公开(公告)号：US06576946B1

公开(公告)日：2003-06-10

申请号：US09356705

申请日：1999-07-20

申请人： Misuzu Kanai ,  Yuzuru Ohji ,  Takuya Fukuda ,  Shinpei Iijima ,  Ryouichi Furukawa ,  Yasuhiro Sugawara ,  Hideharu Yahata

发明人： Misuzu Kanai ,  Yuzuru Ohji ,  Takuya Fukuda ,  Shinpei Iijima ,  Ryouichi Furukawa ,  Yasuhiro Sugawara ,  Hideharu Yahata

IPC分类号： H01L27108

CPC分类号： H01L28/91 ,  H01L27/10814

摘要： Capacitors are stretched over a plurality of memory cells in the direction of a bit line in order to effectively utilize spaces between adjacent cells. In addition, by creating a cubic structure of each capacitor by adoption of a self-matching technique, the structure can be utilized more effectively. As a result, it is possible to assure a sufficient capacitor capacitance in spite of a limitation imposed by the fabrication technology and obtain an assurance of sufficient space between cells in a shrunk area of a memory cell accompanying high-scale integration and miniaturization of a semiconductor device.

摘要翻译： 电容器沿着位线的方向在多个存储单元上被拉伸，以有效地利用相邻单元之间的空间。 此外，通过采用自匹配技术来形成每个电容器的立方结构，可以更有效地利用结构。 结果，尽管制造技术受到限制，但是可以确保足够的电容器电容，并且可以确保伴随高精度集成的存储单元的收缩区域中的单元之间的足够的空间以及半导体的小型化 设备。

公开(公告)号：US06534375B2

公开(公告)日：2003-03-18

申请号：US09923406

申请日：2001-08-08

申请人： Shinpei Iijima ,  Yuzuru Ohji ,  Masato Kunitomo ,  Masahiko Hiratani ,  Yuichi Matsui ,  Hiroyuki Ohta ,  Yukihiro Kumagai

发明人： Shinpei Iijima ,  Yuzuru Ohji ,  Masato Kunitomo ,  Masahiko Hiratani ,  Yuichi Matsui ,  Hiroyuki Ohta ,  Yukihiro Kumagai

IPC分类号： H01L21285

CPC分类号： H01L21/02183 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02356 ,  H01L21/31637 ,  H01L27/10814 ,  H01L27/10855 ,  H01L28/60 ,  H01L28/91

摘要： A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.

摘要翻译： 形成在DRAM的电容元件的下部电极上形成的电介质膜的氧气氛中的氧气的缺点是氧气渗透下部电极氧化阻挡层以形成高电阻和低介电常数的氧化物层。 在形成在信息容纳电容元件C的下部电极下方的通孔中的插塞表面上形成Ru Ru硅化物层，并且在Ru硅化物层的表面上进一步形成Ru氮化硅层。 在下电极上形成电介质膜的步骤中进行的氧气氛中进行高温热处理时，将Ru氮化硅层牺牲性氧化为Ru氮氧化硅，以防止Ru化硅化物层的氧化进行。