公开(公告)号：US07065701B2

公开(公告)日：2006-06-20

申请号：US10273256

申请日：2002-10-18

申请人： Sooyoung Kim ,  Woo-Seok Yang ,  Ho-Jin Lee

发明人： Sooyoung Kim ,  Woo-Seok Yang ,  Ho-Jin Lee

IPC分类号： H03M13/03

CPC分类号： H03M13/2963 ,  G11B20/1833 ,  H03M13/4138 ,  H03M13/658

摘要： A method for iteratively decoding a block turbo code includes: receiving a signal frame formed of a product code obtained by serially concatenating block codes; forming a reliability array for signal demodulation and initializing extrinsic reliability information; performing a complexity-reduced soft decision output Viterbi decoding algorithm for all of the codewords existing on a current axis and calculating extrinsic reliability using soft decision output information output as a result of the decoding; checking whether an iterative decoding completion condition is satisfied, and outputting a decoded value and terminating an iterative decoding process when the condition is satisfied; and normalizing reliability information when the condition is not satisfied, performing reliability equalization, and repeating the decoding process for a next axis.

公开(公告)号：US06802037B2

公开(公告)日：2004-10-05

申请号：US10028273

申请日：2001-12-28

申请人： Sooyoung Kim ,  Woo-Seok Yang ,  Ho-Jin Lee

发明人： Sooyoung Kim ,  Woo-Seok Yang ,  Ho-Jin Lee

IPC分类号： H03M1300

CPC分类号： H03M13/658 ,  H03M13/152 ,  H03M13/19 ,  H03M13/2963 ,  H03M13/2975 ,  H03M13/4146

摘要： Disclosed is an iterative decoding method using a soft decision output Viterbi algorithm (SOVA) for block turbo codes using product codes wherein block codes are concatenated by greater than three dimensions, which comprises: (a) a transmitter configuring a product code of greater than three dimensions and transmitting it; (b) configuring the signal transmitted by the transmitter into frames for decoding, and initializing external reliability information respectively corresponding to an axis corresponding to the product code of greater than three dimensions; and (c) sequentially iterating the soft decision output Viterbi algorithm (SOVA) decoding with respect to the respective axes.

摘要翻译： 公开了一种迭代解码方法，其使用使用产生代码的块turbo码的软判决输出维特比算法（SOVA），其中块码连接大于三维，其包括：（a）配置大于3的乘积码的发射机 尺寸和传输; （b）将由发射机发送的信号配置成帧以进行解码，以及初始化分别对应于大于三维的乘积码的轴的外部可靠性信息; 和（c）依次迭代相对于各个轴的软判决输出维特比算法（SOVA）解码。

公开(公告)号：US06924591B1

公开(公告)日：2005-08-02

申请号：US10401885

申请日：2003-03-31

申请人： Tok-Chin Woo ,  Hyung-Seok Oh ,  Woo-Seok Yang

发明人： Tok-Chin Woo ,  Hyung-Seok Oh ,  Woo-Seok Yang

IPC分类号： H01J29/87 ,  H04N5/645 ,  H04N5/65 ,  H04N5/655

CPC分类号： H04N5/645 ,  H04N5/655

摘要： An implosion preventing band for a cathode ray tube includes a main band formed around an outer surface of a skirt of a face panel, and including a pair of long sides provided on opposite sides of the skirt in a direction corresponding to long sides of a screen, a pair of short sides provided on opposite sides of the skirt in a direction corresponding to short sides of a screen, and corners formed between the long sides and the short sides to interconnect the same; and degaussing coil supports formed raised from the main band on long and short sides of the main band, and each having formed one or more openings that allow passage in a direction of a width of the main band, a degaussing coil(s) being supported using the openings. A plurality of the openings is formed continuously in the degaussing coil supports in a circumferential direction of the main band.

摘要翻译： 用于阴极射线管的防爆带包括形成在面板的裙部的外表面周围的主带，并且包括一对长边，其在与屏幕的长边相对应的方向上设置在裙部的相对侧上 一对短边在与裙部短边相对应的方向上设置在裙部的相对侧上，以及形成在长边和短边之间的角部以使其相互连接; 以及从所述主带的长边和短边从所述主带形成的消磁线圈支架，并且各自形成有一个或多个允许沿所述主带的宽度方向通过的开口，所述消磁线圈被支撑 使用开口。 多个开口在主带的圆周方向上在消磁线圈支撑件中连续地形成。

公开(公告)号：US06747302B2

公开(公告)日：2004-06-08

申请号：US10133505

申请日：2002-04-26

申请人： Nam-Kyeong Kim ,  Seung-Jin Yeom ,  Woo-Seok Yang ,  Soon-Yong Kweon

发明人： Nam-Kyeong Kim ,  Seung-Jin Yeom ,  Woo-Seok Yang ,  Soon-Yong Kweon

IPC分类号： H01L2100

CPC分类号： H01L21/02197 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02282 ,  H01L21/02356 ,  H01L21/31691 ,  H01L28/55

摘要： A ferroelectric memory device and a method for manufacturing the same is disclosed. Because a (BixLay)Ti3O12 (BLT) layer, which can be crystallized in relatively low temperature, is used in a capacitor, the electrical characteristics of the ferroelectric capacitor can be improved. The method for manufacturing ferroelectric memory device includes the steps of forming a first conductive layer for a bottom electrode on a semiconductor substrate, forming the (BixLay)Ti3O12 ferroelectric layer, wherein ‘x’ representing atomic concentration of Bi ranges from about 3.25 to about 3.35 and ‘y’ representing atomic concentration of La ranges from about 0.70 to about 0.90 and forming a second conductive layer for a top electrode on the (BixLay)Ti3O12 ferroelectric layer.

摘要翻译： 公开了铁电存储器件及其制造方法。 因为可以在较低温度下结晶的（BixLay）Ti 3 O 12（BLT）层用于电容器中，因此可以提高铁电电容器的电特性。 制造铁电存储器件的方法包括以下步骤：在半导体衬底上形成用于底部电极的第一导电层，形成（BixLay）Ti 3 O 12铁电层，其中代表Bi的原子浓度的“x”范围为约3.25至约3.35 和表示La的原子浓度的“y”范围为约0.70至约0.90，并且在（BixLay）Ti 3 O 12铁电层上形成用于顶部电极的第二导电层。

公开(公告)号：US06627462B1

公开(公告)日：2003-09-30

申请号：US09605758

申请日：2000-06-28

申请人： Woo-Seok Yang ,  Seung-Jin Yeom ,  Yong-Sik Yu

发明人： Woo-Seok Yang ,  Seung-Jin Yeom ,  Yong-Sik Yu

IPC分类号： H01L2100

CPC分类号： H01L28/40 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76895 ,  H01L27/1085

摘要： A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate, a capacitor structure formed over the transistor, a metal interconnection for electrically connecting the capacitor structure to the transistor, a barrier layer formed on top of the metal interconnection and an inter-metal dielectric (IMD) layer formed on top of the barrier layer, wherein the barrier layer is made of a material such as A12O3 or the like. The IMD layer is formed by using a plasma chemical vapor deposition (CVD) in a hydrogen rich atmosphere, wherein the barrier layer is used for preventing the capacitor structure from the hydrogen.

摘要翻译： 用于存储单元的半导体器件包括：设置有硅衬底的有源矩阵，形成在硅衬底上的晶体管，形成在晶体管上的电容器结构，用于将电容器结构电连接到晶体管的金属互连， 形成在金属互连顶部上的层，以及形成在阻挡层顶部上的金属间电介质（IMD）层，其中阻挡层由诸如A12O3等的材料制成。 通过在富氢气氛中使用等离子体化学气相沉积（CVD）形成IMD层，其中阻挡层用于防止电容器结构脱离氢。

公开(公告)号：US09576695B2

公开(公告)日：2017-02-21

申请号：US14239599

申请日：2012-08-30

申请人： Woo-Seok Yang ,  Hyeong-Keun Kim ,  Tae-Young Kim

发明人： Woo-Seok Yang ,  Hyeong-Keun Kim ,  Tae-Young Kim

IPC分类号： B32B9/00 ,  H01B1/04 ,  B32B27/06

CPC分类号： H01B1/04 ,  B32B27/06 ,  Y10T428/30

摘要： A graphene-based laminate including a doped polymer layer is disclosed. The graphene-based laminate may include a substrate; a graphene layer disposed on the substrate and including at least one layer; and a doped polymer layer disposed on at least one surface of the graphene layer and including an organic dopant.

摘要翻译： 公开了一种包含掺杂聚合物层的基于石墨烯的层压体。 石墨烯层压板可以包括基材; 设置在所述基板上并且包括至少一个层的石墨烯层; 以及设置在所述石墨烯层的至少一个表面上并包括有机掺杂剂的掺杂聚合物层。

公开(公告)号：US06238934B1

公开(公告)日：2001-05-29

申请号：US09467755

申请日：1999-12-20

申请人： Woo-Seok Yang

发明人： Woo-Seok Yang

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  Y10S148/003

摘要： A method for fabricating a ferroelectric capacitor in a ferroelectric memory device includes the steps of forming a first conductive layer on a semiconductor structure prepared for a formation of ferroelectric capacitor, forming a first ferroelectric layer on said first conductive layer, carrying out a rapid thermal annealing for nucleation in said ferroelectric layer, forming a second conductive layer on said ferroelectric layer, and carrying out a thermal treatment for a grain growth in said ferroelectric layer, thereby the interface characteristics are improved, reducing leakage currents and preventing a peeling phenomenon during a following etching process.

摘要翻译： 在铁电存储器件中制造铁电电容器的方法包括以下步骤：在制备用于形成铁电电容器的半导体结构上形成第一导电层，在所述第一导电层上形成第一铁电层，进行快速热退火 对于所述铁电体层的成核，在所述强电介质层上形成第二导电层，对所述强电介质层进行晶粒生长的热处理，从而提高界面特性，减少漏电流，防止后续的剥离现象 蚀刻工艺。

公开(公告)号：US20140234627A1

公开(公告)日：2014-08-21

申请号：US14239599

申请日：2012-08-30

申请人： Woo-Seok Yang ,  Hyeong-Keun Kim ,  Tae-Young Kim

发明人： Woo-Seok Yang ,  Hyeong-Keun Kim ,  Tae-Young Kim

IPC分类号： H01B1/04 ,  B32B27/06

CPC分类号： H01B1/04 ,  B32B27/06 ,  Y10T428/30

摘要： A graphene-based laminate including a doped polymer layer is disclosed. The graphene-based laminate may include a substrate; a graphene layer disposed on the substrate and including at least one layer; and a doped polymer layer disposed on at least one surface of the graphene layer and including an organic dopant.

摘要翻译： 公开了一种包含掺杂聚合物层的基于石墨烯的层压体。 石墨烯层压板可以包括基材; 设置在所述基板上并且包括至少一个层的石墨烯层; 以及设置在所述石墨烯层的至少一个表面上并包括有机掺杂剂的掺杂聚合物层。

公开(公告)号：US06627495B2

公开(公告)日：2003-09-30

申请号：US10034828

申请日：2001-12-28

申请人： Woo-Seok Yang

发明人： Woo-Seok Yang

IPC分类号： H01L218242

CPC分类号： H01L21/02071 ,  H01L21/32136 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75

摘要： A method for forming a capacitor in a semiconductor device is disclosed, in which the dielectric medium of the capacitor is a ferroelectric film or a high dielectric constant film. In the method for forming a capacitor in a semiconductor device, peeling of the lower electrode is prevented, and the etch residues (organic polymer) which have been formed when carrying out a dry etching can be effectively removed.

公开(公告)号：US20050098812A1

公开(公告)日：2005-05-12

申请号：US10632956

申请日：2003-08-04

申请人： Woo-Seok Yang ,  Seung-Jin Yeom ,  Yong-Sik Yu

发明人： Woo-Seok Yang ,  Seung-Jin Yeom ,  Yong-Sik Yu

IPC分类号： C23C16/40 ,  H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246 ,  H01L23/522 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L21/0228 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76895 ,  H01L27/1085 ,  H01L28/40

摘要： A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate, a capacitor structure formed over the transistor, a metal interconnection for electrically connecting the capacitor structure to the transistor, a barrier layer formed on top of the metal interconnection and an inter-metal dielectric (IMD) layer formed on top of the barrier layer, wherein the barrier layer is made of a material such as Al2O3 or the like. The IMD layer is formed by using a plasma chemical vapor deposition (CVD) in a hydrogen rich atmosphere, wherein the barrier layer is used for preventing the capacitor structure from the hydrogen.

摘要翻译： 用于存储单元的半导体器件包括：设置有硅衬底的有源矩阵，形成在硅衬底上的晶体管，形成在晶体管上的电容器结构，用于将电容器结构电连接到晶体管的金属互连， 形成在金属互连的顶部上的层，以及形成在阻挡层顶部上的金属间电介质（IMD）层，其中阻挡层由诸如Al 2 O 3的材料制成， 3等。 通过在富氢气氛中使用等离子体化学气相沉积（CVD）形成IMD层，其中阻挡层用于防止电容器结构脱离氢。