摘要:
Disclosed is an iterative decoding method using a soft decision output Viterbi algorithm (SOVA) for block turbo codes using product codes wherein block codes are concatenated by greater than three dimensions, which comprises: (a) a transmitter configuring a product code of greater than three dimensions and transmitting it; (b) configuring the signal transmitted by the transmitter into frames for decoding, and initializing external reliability information respectively corresponding to an axis corresponding to the product code of greater than three dimensions; and (c) sequentially iterating the soft decision output Viterbi algorithm (SOVA) decoding with respect to the respective axes.
摘要:
A method for iteratively decoding a block turbo code includes: receiving a signal frame formed of a product code obtained by serially concatenating block codes; forming a reliability array for signal demodulation and initializing extrinsic reliability information; performing a complexity-reduced soft decision output Viterbi decoding algorithm for all of the codewords existing on a current axis and calculating extrinsic reliability using soft decision output information output as a result of the decoding; checking whether an iterative decoding completion condition is satisfied, and outputting a decoded value and terminating an iterative decoding process when the condition is satisfied; and normalizing reliability information when the condition is not satisfied, performing reliability equalization, and repeating the decoding process for a next axis.
摘要:
In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
摘要:
Provided herein are semiconductor devices with through electrodes and methods of fabricating the same. The methods may include providing a semiconductor substrate having top and bottom surfaces facing each other, forming on the top surface of the semiconductor substrate a main via having a hollow cylindrical structure and a metal line connected to the main via, forming an interlayered insulating layer on the top surface of the semiconductor substrate to cover the main via and the metal line, removing a portion of the semiconductor substrate to form a via hole exposing a portion of a bottom surface of the main via, and forming in the via hole a through electrode that is electrically connected to the main via. The bottom surface of the main via is overlapped by a circumference of the via hole, when viewed in a plan view.
摘要:
Disclosed is a phase error estimating an apparatus and a method which provides improved convergence speed and tracking speed even in mobile channel environment by variably applying the step size for phase error estimation according to channel status. The apparatus for estimating a phase error includes: a posterior probability (APP) average calculating unit for calculating an APP average value from a soft decision result of a currently received symbol; a step size determining unit for determining a step size variably according to channel status; and a phase error estimating unit for estimating a phase error of the currently received symbol from a phase error of a previously received symbol and the APP average value by using the variably determined step size.
摘要:
A system for controlling temperature of an antenna module including a heat generating module, and a radome and an underbody cover that enclose the heat generating module. The system includes: a heat collecting unit mounted on inner surface of the antenna module; a heat discharging unit mounted on outer surface of the antenna module; and a heat transfer unit for transferring heat from the heat collecting unit to the heat discharging unit.
摘要:
A motion estimation method, medium, and system with fast motion estimation. The motion estimation method includes comparing a cost indicating a difference between a current block of a current image and a block of a reference image specified by a starting point with a predetermined threshold and selectively searching for the best matching block of the current block from the starting point according to the comparison result.
摘要:
Provided is a semiconductor device. The semiconductor device may include a first semiconductor chip that includes a first through silicon via having a first protrusion height and a second through silicon via having a second protrusion height greater than the first protrusion height which are penetrating at least a portion of the first semiconductor chip, a second semiconductor chip may be electrically connected to the first through silicon via, and a third semiconductor chip may be electrically connected to the second through silicon via.
摘要:
In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-relief spacer. In one example, such isolation takes the form of an air gap. In another example, such isolation takes the form of an elastomer material. In either case, mismatch in coefficient of thermal expansion between the metal interconnect fingers and the body of the chip is avoided, alleviating the problems associated with cracking and delamination, and leading to improved device yield and device reliability.
摘要:
This research discloses an ultra wideband system-on-package (SoP). The SoP includes a package body; a first integrated circuit mounted on the package body; a first signal transmission unit connected to the first integrated circuit; a signal via connected to the first signal transmission unit and including a slab line and a trough line; and a second signal transmission unit connected to the signal via. The technology of the present research can transmit ultra broadband signals by minimizing discontinuity of signals appearing during vertical transition that occurs in the course of a signal transmission to/from an external circuit, and a fabrication method thereof.