Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD
    1.
    发明授权
    Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD 失效
    集成过程调制(IPM)是HDP-CVD填缝的新解决方案

    公开(公告)号:US07524750B2

    公开(公告)日:2009-04-28

    申请号:US11553772

    申请日:2006-10-27

    IPC分类号: H01L21/20

    CPC分类号: H01L21/76224

    摘要: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.

    摘要翻译: 提供了一种在设置在处理室中的衬底上沉积氧化硅膜的工艺。 包括卤素源,流动气体,硅源和氧化性气体反应物的处理气体流入处理室。 从处理气体形成具有至少1011个离子/ cm 3的离子密度的等离子体。 氧化硅膜以低于1.0%的卤素浓度沉积在衬底上。 使用具有同时沉积和溅射组分的工艺,用等离子体沉积氧化硅膜。 卤素源到处理室的流速与硅源到处理室的流速基本上在0.5和3.0之间。

    INTEGRATED PROCESS MODULATION (IPM) A NOVEL SOLUTION FOR GAPFILL WITH HDP-CVD
    2.
    发明申请
    INTEGRATED PROCESS MODULATION (IPM) A NOVEL SOLUTION FOR GAPFILL WITH HDP-CVD 失效
    集成过程调制(IPM)用于HDP-CVD的GAPFILL的新颖解决方案

    公开(公告)号:US20070243693A1

    公开(公告)日:2007-10-18

    申请号:US11553772

    申请日:2006-10-27

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76224

    摘要: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.

    摘要翻译: 提供了一种在设置在处理室中的衬底上沉积氧化硅膜的工艺。 包括卤素源,流动气体,硅源和氧化性气体反应物的处理气体流入处理室。 从处理气体形成离子密度为至少10 11个/ cm 3的等离子体。 氧化硅膜以低于1.0%的卤素浓度沉积在衬底上。 使用具有同时沉积和溅射组分的工艺,用等离子体沉积氧化硅膜。 卤素源到处理室的流速与硅源到处理室的流速基本上在0.5和3.0之间。

    Process sequence for formation of patterned hard mask film (RFP) without need for photoresist or dry etch
    4.
    发明授权
    Process sequence for formation of patterned hard mask film (RFP) without need for photoresist or dry etch 有权
    用于形成图案化硬掩模膜(RFP)的工艺顺序,无需光致抗蚀剂或干蚀刻

    公开(公告)号:US08153348B2

    公开(公告)日:2012-04-10

    申请号:US12034000

    申请日:2008-02-20

    IPC分类号: G03F7/26

    摘要: Method and systems for patterning a hardmask film using ultraviolet light is disclosed according to one embodiment of the invention. Embodiments of the present invention alleviate the processing problem of depositing and etching photoresist in order to produce a hardmask pattern. A hardmask layer, such as, silicon oxide, is first deposited on a substrate within a deposition chamber. In some cases, the hardmask layer is baked or annealed following deposition. After which, portions of the hardmask layer are exposed with ultraviolet light. The ultraviolet light produces a pattern of exposed and unexposed portions of hardmask material. Following the exposure, an etching process, such as a wet etch, may occur that removes the unexposed portions of the hardmask. Following the etch, the hardmask may be annealed, baked or subjected to a plasma treatment.

    摘要翻译: 根据本发明的一个实施方案公开了使用紫外光图案化硬掩膜的方法和系统。 本发明的实施例减轻了沉积和蚀刻光刻胶的处理问题,以产生硬掩模图案。 首先将诸如氧化硅的硬掩模层沉积在沉积室内的衬底上。 在一些情况下,硬掩模层在沉积之后被烘烤或退火。 之后,硬掩模层的一部分用紫外线照射。 紫外光产生硬掩模材料的暴露和未曝光部分的图案。 曝光后,可能会发生腐蚀过程,例如湿蚀刻,从而去除硬掩模的未曝光部分。 在蚀刻之后,可以对硬掩模进行退火,烘烤或进行等离子体处理。

    Dopant activation in doped semiconductor substrates
    9.
    发明授权
    Dopant activation in doped semiconductor substrates 失效
    掺杂半导体衬底中的掺杂剂活化

    公开(公告)号:US07989366B2

    公开(公告)日:2011-08-02

    申请号:US11844810

    申请日:2007-08-24

    IPC分类号: H01L21/00

    CPC分类号: H01L21/268 H01L21/26513

    摘要: Methods are disclosed for activating dopants in a doped semiconductor substrate. A carbon precursor is flowed into a substrate processing chamber within which the doped semiconductor substrate is disposed. A plasma is formed from the carbon precursor in the substrate processing chamber. A carbon film is deposited over the substrate with the plasma. A temperature of the substrate is maintained while depositing the carbon film less than 500° C. The deposited carbon film is exposed to electromagnetic radiation for a period less than 10 ms, and has an extinction coefficient greater than 0.3 at a wavelength comprised by the electromagnetic radiation.

    摘要翻译: 公开了用于激活掺杂半导体衬底中的掺杂剂的方法。 碳前体流入其中设置掺杂半导体衬底的衬底处理室。 在基板处理室中由碳前体形成等离子体。 用等离子体沉积在衬底上的碳膜。 在沉积低于500℃的碳膜的同时保持基板的温度。沉积的碳膜暴露于电磁辐射小于10ms的时间段,并且在电磁波包括的波长处具有大于0.3的消光系数 辐射。

    Silicon oxide gapfill deposition using liquid precursors
    10.
    发明授权
    Silicon oxide gapfill deposition using liquid precursors 失效
    使用液体前体的氧化硅间隙填充沉积

    公开(公告)号:US07087536B2

    公开(公告)日:2006-08-08

    申请号:US10931742

    申请日:2004-09-01

    IPC分类号: H01L21/31 H01L21/469

    摘要: A silicon oxide film is deposited on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A liquid Si—C—O—H precursor is vaporized. A flow of the vaporized liquid Si—C—O—H precursor is provided to the substrate processing chamber. A gaseous oxidizer is also flowed to the substrate processing chamber. A deposition plasma is generated inductively from the precursor and the oxidizer in the substrate processing chamber, and the silicon oxide film is deposited over the substrate and within the gap with the deposition plasma.

    摘要翻译: 在设置在基板处理室中的基板上沉积氧化硅膜。 基板在相邻的凸起表面之间形成间隙。 液体Si-C-O-H前体蒸发。 蒸发的液体Si-C-O-H前体的流动被提供到基底处理室。 气态氧化剂也流到衬底处理室。 从衬底处理室中的前体和氧化剂感应地产生沉积等离子体,并且氧化硅膜沉积在衬底上并且与沉积等离子体在间隙内沉积。